TianoCore EDK2 master
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ArmGicV2NonSecLib.c
Go to the documentation of this file.
1
9#include <Uefi.h>
10#include <Library/IoLib.h>
11#include <Library/ArmGicLib.h>
12
13VOID
14EFIAPI
15ArmGicV2EnableInterruptInterface (
16 IN UINTN GicInterruptInterfaceBase
17 )
18{
19 /*
20 * Enable the CPU interface in Non-Secure world
21 * Note: The ICCICR register is banked when Security extensions are implemented
22 */
23 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
24}
25
26VOID
27EFIAPI
28ArmGicV2DisableInterruptInterface (
29 IN UINTN GicInterruptInterfaceBase
30 )
31{
32 // Disable Gic Interface
33 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
34 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
35}
UINT64 UINTN
UINT32 EFIAPI MmioWrite32(IN UINTN Address, IN UINT32 Value)
Definition: IoLib.c:309
#define IN
Definition: Base.h:279