15ArmGicV2EnableInterruptInterface (
16 IN UINTN GicInterruptInterfaceBase
23 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
28ArmGicV2DisableInterruptInterface (
29 IN UINTN GicInterruptInterfaceBase
33 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
34 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
UINT32 EFIAPI MmioWrite32(IN UINTN Address, IN UINT32 Value)