12#define ID_MMFR0_SHARELVL_SHIFT 12
13#define ID_MMFR0_SHARELVL_MASK 0xf
14#define ID_MMFR0_SHARELVL_ONE 0
15#define ID_MMFR0_SHARELVL_TWO 1
17#define ID_MMFR0_INNERSHR_SHIFT 28
18#define ID_MMFR0_INNERSHR_MASK 0xf
19#define ID_MMFR0_OUTERSHR_SHIFT 8
20#define ID_MMFR0_OUTERSHR_MASK 0xf
22#define ID_MMFR0_SHR_IMP_UNCACHED 0
23#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
24#define ID_MMFR0_SHR_IGNORED 0xf
UINT32 EFIAPI ArmReadIdMmfr4(VOID)