TianoCore EDK2 master
Loading...
Searching...
No Matches
CpuArch.h
1/* CpuArch.h -- CPU specific code
22018-02-18 : Igor Pavlov : Public domain */
3
4#ifndef __CPU_ARCH_H
5#define __CPU_ARCH_H
6
7#include "7zTypes.h"
8
9EXTERN_C_BEGIN
10
11/*
12MY_CPU_LE means that CPU is LITTLE ENDIAN.
13MY_CPU_BE means that CPU is BIG ENDIAN.
14If MY_CPU_LE and MY_CPU_BE are not defined, we don't know about ENDIANNESS of platform.
15
16MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned memory accesses.
17*/
18
19#if defined (_M_X64) \
20 || defined (_M_AMD64) \
21 || defined (__x86_64__) \
22 || defined (__AMD64__) \
23 || defined (__amd64__)
24#define MY_CPU_AMD64
25 #ifdef __ILP32__
26#define MY_CPU_NAME "x32"
27 #else
28#define MY_CPU_NAME "x64"
29 #endif
30#define MY_CPU_64BIT
31#endif
32
33#if defined (_M_IX86) \
34 || defined (__i386__)
35#define MY_CPU_X86
36#define MY_CPU_NAME "x86"
37#define MY_CPU_32BIT
38#endif
39
40#if defined (_M_ARM64) \
41 || defined (__AARCH64EL__) \
42 || defined (__AARCH64EB__) \
43 || defined (__aarch64__)
44#define MY_CPU_ARM64
45#define MY_CPU_NAME "arm64"
46#define MY_CPU_64BIT
47#endif
48
49#if defined (_M_ARM) \
50 || defined (_M_ARM_NT) \
51 || defined (_M_ARMT) \
52 || defined (__arm__) \
53 || defined (__thumb__) \
54 || defined (__ARMEL__) \
55 || defined (__ARMEB__) \
56 || defined (__THUMBEL__) \
57 || defined (__THUMBEB__)
58#define MY_CPU_ARM
59#define MY_CPU_NAME "arm"
60#define MY_CPU_32BIT
61#endif
62
63#if defined (_M_IA64) \
64 || defined (__ia64__)
65#define MY_CPU_IA64
66#define MY_CPU_NAME "ia64"
67#define MY_CPU_64BIT
68#endif
69
70#if defined (__mips64) \
71 || defined (__mips64__) \
72 || (defined (__mips) && (__mips == 64 || __mips == 4 || __mips == 3))
73#define MY_CPU_NAME "mips64"
74#define MY_CPU_64BIT
75#elif defined (__mips__)
76#define MY_CPU_NAME "mips"
77/* #define MY_CPU_32BIT */
78#endif
79
80#if defined (__ppc64__) \
81 || defined (__powerpc64__)
82 #ifdef __ILP32__
83#define MY_CPU_NAME "ppc64-32"
84 #else
85#define MY_CPU_NAME "ppc64"
86 #endif
87#define MY_CPU_64BIT
88#elif defined (__ppc__) \
89 || defined (__powerpc__)
90#define MY_CPU_NAME "ppc"
91#define MY_CPU_32BIT
92#endif
93
94#if defined (__sparc64__)
95#define MY_CPU_NAME "sparc64"
96#define MY_CPU_64BIT
97#elif defined (__sparc__)
98#define MY_CPU_NAME "sparc"
99/* #define MY_CPU_32BIT */
100#endif
101
102#if defined (MY_CPU_X86) || defined (MY_CPU_AMD64)
103#define MY_CPU_X86_OR_AMD64
104#endif
105
106#ifdef _WIN32
107
108 #ifdef MY_CPU_ARM
109#define MY_CPU_ARM_LE
110 #endif
111
112 #ifdef MY_CPU_ARM64
113#define MY_CPU_ARM64_LE
114 #endif
115
116 #ifdef _M_IA64
117#define MY_CPU_IA64_LE
118 #endif
119
120#endif
121
122#if defined (MY_CPU_X86_OR_AMD64) \
123 || defined (MY_CPU_ARM_LE) \
124 || defined (MY_CPU_ARM64_LE) \
125 || defined (MY_CPU_IA64_LE) \
126 || defined (__LITTLE_ENDIAN__) \
127 || defined (__ARMEL__) \
128 || defined (__THUMBEL__) \
129 || defined (__AARCH64EL__) \
130 || defined (__MIPSEL__) \
131 || defined (__MIPSEL) \
132 || defined (_MIPSEL) \
133 || defined (__BFIN__) \
134 || (defined (__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
135#define MY_CPU_LE
136#endif
137
138#if defined (__BIG_ENDIAN__) \
139 || defined (__ARMEB__) \
140 || defined (__THUMBEB__) \
141 || defined (__AARCH64EB__) \
142 || defined (__MIPSEB__) \
143 || defined (__MIPSEB) \
144 || defined (_MIPSEB) \
145 || defined (__m68k__) \
146 || defined (__s390__) \
147 || defined (__s390x__) \
148 || defined (__zarch__) \
149 || (defined (__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
150#define MY_CPU_BE
151#endif
152
153#if defined (MY_CPU_LE) && defined (MY_CPU_BE)
154 #error Stop_Compiling_Bad_Endian
155#endif
156
157#if defined (MY_CPU_32BIT) && defined (MY_CPU_64BIT)
158 #error Stop_Compiling_Bad_32_64_BIT
159#endif
160
161#ifndef MY_CPU_NAME
162 #ifdef MY_CPU_LE
163#define MY_CPU_NAME "LE"
164 #elif defined (MY_CPU_BE)
165#define MY_CPU_NAME "BE"
166 #else
167
168/*
169#define MY_CPU_NAME ""
170*/
171 #endif
172#endif
173
174#ifdef MY_CPU_LE
175 #if defined (MY_CPU_X86_OR_AMD64) \
176 || defined (MY_CPU_ARM64) \
177 || defined (__ARM_FEATURE_UNALIGNED)
178#define MY_CPU_LE_UNALIGN
179 #endif
180#endif
181
182#ifdef MY_CPU_LE_UNALIGN
183
184#define GetUi16(p) (*(const UInt16 *)(const void *)(p))
185#define GetUi32(p) (*(const UInt32 *)(const void *)(p))
186#define GetUi64(p) (*(const UInt64 *)(const void *)(p))
187
188#define SetUi16(p, v) { *(UInt16 *)(p) = (v); }
189#define SetUi32(p, v) { *(UInt32 *)(p) = (v); }
190#define SetUi64(p, v) { *(UInt64 *)(p) = (v); }
191
192#else
193
194#define GetUi16(p) ( (UInt16) (\
195 ((const Byte *)(p))[0] | \
196 ((UInt16)((const Byte *)(p))[1] << 8) ))
197
198#define GetUi32(p) (\
199 ((const Byte *)(p))[0] | \
200 ((UInt32)((const Byte *)(p))[1] << 8) | \
201 ((UInt32)((const Byte *)(p))[2] << 16) | \
202 ((UInt32)((const Byte *)(p))[3] << 24))
203
204#define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
205
206#define SetUi16(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v);\
207 _ppp_[0] = (Byte)_vvv_; \
208 _ppp_[1] = (Byte)(_vvv_ >> 8); }
209
210#define SetUi32(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v);\
211 _ppp_[0] = (Byte)_vvv_; \
212 _ppp_[1] = (Byte)(_vvv_ >> 8); \
213 _ppp_[2] = (Byte)(_vvv_ >> 16); \
214 _ppp_[3] = (Byte)(_vvv_ >> 24); }
215
216#define SetUi64(p, v) { Byte *_ppp2_ = (Byte *)(p); UInt64 _vvv2_ = (v);\
217 SetUi32(_ppp2_ , (UInt32)_vvv2_); \
218 SetUi32(_ppp2_ + 4, (UInt32)(_vvv2_ >> 32)); }
219
220#endif
221
222#ifdef __has_builtin
223#define MY__has_builtin(x) __has_builtin(x)
224#else
225#define MY__has_builtin(x) 0
226#endif
227
228#if defined (MY_CPU_LE_UNALIGN) && /* defined(_WIN64) && */ (_MSC_VER >= 1300)
229
230/* Note: we use bswap instruction, that is unsupported in 386 cpu */
231
232 #include <stdlib.h>
233
234 #pragma intrinsic(_byteswap_ushort)
235 #pragma intrinsic(_byteswap_ulong)
236 #pragma intrinsic(_byteswap_uint64)
237
238/* #define GetBe16(p) _byteswap_ushort(*(const UInt16 *)(const Byte *)(p)) */
239#define GetBe32(p) _byteswap_ulong(*(const UInt32 *)(const Byte *)(p))
240#define GetBe64(p) _byteswap_uint64(*(const UInt64 *)(const Byte *)(p))
241
242#define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = _byteswap_ulong(v)
243
244#elif defined (MY_CPU_LE_UNALIGN) && ( \
245 (defined (__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))) \
246 || (defined (__clang__) && MY__has_builtin (__builtin_bswap16)))
247
248/* #define GetBe16(p) __builtin_bswap16(*(const UInt16 *)(const Byte *)(p)) */
249#define GetBe32(p) __builtin_bswap32(*(const UInt32 *)(const Byte *)(p))
250#define GetBe64(p) __builtin_bswap64(*(const UInt64 *)(const Byte *)(p))
251
252#define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = __builtin_bswap32(v)
253
254#else
255
256#define GetBe32(p) (\
257 ((UInt32)((const Byte *)(p))[0] << 24) | \
258 ((UInt32)((const Byte *)(p))[1] << 16) | \
259 ((UInt32)((const Byte *)(p))[2] << 8) | \
260 ((const Byte *)(p))[3] )
261
262#define GetBe64(p) (((UInt64)GetBe32(p) << 32) | GetBe32(((const Byte *)(p)) + 4))
263
264#define SetBe32(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v);\
265 _ppp_[0] = (Byte)(_vvv_ >> 24); \
266 _ppp_[1] = (Byte)(_vvv_ >> 16); \
267 _ppp_[2] = (Byte)(_vvv_ >> 8); \
268 _ppp_[3] = (Byte)_vvv_; }
269
270#endif
271
272#ifndef GetBe16
273
274#define GetBe16(p) ( (UInt16) (\
275 ((UInt16)((const Byte *)(p))[0] << 8) | \
276 ((const Byte *)(p))[1] ))
277
278#endif
279
280#ifdef MY_CPU_X86_OR_AMD64
281
282typedef struct {
283 UInt32 maxFunc;
284 UInt32 vendor[3];
285 UInt32 ver;
286 UInt32 b;
287 UInt32 c;
288 UInt32 d;
289} Cx86cpuid;
290
291enum {
292 CPU_FIRM_INTEL,
293 CPU_FIRM_AMD,
294 CPU_FIRM_VIA
295};
296
297void
298MyCPUID (
299 UInt32 function,
300 UInt32 *a,
301 UInt32 *b,
302 UInt32 *c,
303 UInt32 *d
304 );
305
306BoolInt
307x86cpuid_CheckAndRead (
308 Cx86cpuid *p
309 );
310
311int
312x86cpuid_GetFirm (
313 const Cx86cpuid *p
314 );
315
316#define x86cpuid_GetFamily(ver) (((ver >> 16) & 0xFF0) | ((ver >> 8) & 0xF))
317#define x86cpuid_GetModel(ver) (((ver >> 12) & 0xF0) | ((ver >> 4) & 0xF))
318#define x86cpuid_GetStepping(ver) (ver & 0xF)
319
320BoolInt
321CPU_Is_InOrder (
322 );
323
324BoolInt
325CPU_Is_Aes_Supported (
326 );
327
328BoolInt
329CPU_IsSupported_PageGB (
330 );
331
332#endif
333
334EXTERN_C_END
335
336#endif