18#define CPUCFG_REG0_INFO 0x0
35} CPUCFG_REG0_INFO_DATA;
43#define CPUCFG_REG1_INFO 0x1
106 UINT32 IOCSR_BRD : 1;
121} CPUCFG_REG1_INFO_DATA;
129#define CPUCFG_REG2_INFO 0x2
230} CPUCFG_REG2_INFO_DATA;
238#define CPUCFG_REG3_INFO 0x3
293 UINT32 SPW_HP_HF : 1;
306 UINT32 Reserved : 15;
312} CPUCFG_REG3_INFO_DATA;
320#define CPUCFG_REG4_INFO 0x4
338} CPUCFG_REG4_INFO_DATA;
346#define CPUCFG_REG5_INFO 0x5
369} CPUCFG_REG5_INFO_DATA;
377#define CPUCFG_REG6_INFO 0x6
410 UINT32 Reserved : 17;
416} CPUCFG_REG6_INFO_DATA;
424#define CPUCFG_REG16_INFO 0x10
436 UINT32 L1_IU_Present : 1;
441 UINT32 L1_IU_Unify : 1;
445 UINT32 L1_D_Present : 1;
450 UINT32 L2_IU_Present : 1;
455 UINT32 L2_IU_Unify : 1;
460 UINT32 L2_IU_Private : 1;
465 UINT32 L2_IU_Inclusive : 1;
469 UINT32 L2_D_Present : 1;
473 UINT32 L2_D_Private : 1;
478 UINT32 L2_D_Inclusive : 1;
483 UINT32 L3_IU_Present : 1;
488 UINT32 L3_IU_Unify : 1;
493 UINT32 L3_IU_Private : 1;
498 UINT32 L3_IU_Inclusive : 1;
502 UINT32 L3_D_Present : 1;
506 UINT32 L3_D_Private : 1;
511 UINT32 L3_D_Inclusive : 1;
515 UINT32 Reserved : 15;
521} CPUCFG_REG16_INFO_DATA;
529#define CPUCFG_REG17_INFO 0x11
530#define CPUCFG_REG18_INFO 0x12
531#define CPUCFG_REG19_INFO 0x13
532#define CPUCFG_REG20_INFO 0x14
550 UINT32 Index_log2 : 8;
554 UINT32 Linesize_log2 : 7;
564} CPUCFG_CACHE_INFO_DATA;