TianoCore EDK2 master
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GenericWatchdog.h
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1
13#ifndef GENERIC_WATCHDOG_H_
14#define GENERIC_WATCHDOG_H_
15
16// Refresh Frame:
17#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
18
19// Control Frame:
20#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
21#define GENERIC_WDOG_OFFSET_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
22#define GENERIC_WDOG_OFFSET_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x00C)
23#define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
24#define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x014)
25#define GENERIC_WDOG_IID_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0xFCC)
26
27// Values of bit 0 of the Control/Status Register
28#define GENERIC_WDOG_ENABLED 1
29#define GENERIC_WDOG_DISABLED 0
30
31#define GENERIC_WDOG_IID_ARCH_REV_SHIFT 16
32#define GENERIC_WDOG_IID_ARCH_REV_MASK 0xF
33
34#endif // GENERIC_WATCHDOG_H_