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ArchitecturalMsr.h
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1
15#ifndef AMD_ARCHITECTURAL_MSR_H_
16#define AMD_ARCHITECTURAL_MSR_H_
17
18/*
19 See Appendix A.8, "System Management Mode MSR Cross-Reference".
20
21 SMBASE MSR that contains the SMRAM base address.
22 Reset value: 0000_0000_0003_0000h
23
24*/
25#define AMD_64_SMM_BASE 0xC0010111
26
27/*
28 See Appendix A.8, "System Management Mode MSR Cross-Reference".
29
30 SMM_ADDR Contains the base address of protected
31 memory for the SMM Handler.
32
33 Specific usage, see AMD64 Architecture Programmer’s Manual,
34 Volumes 2 (Rev. 3.37), Section 10.2.5
35
36 Reset value: 0000_0000_0000_0000h
37
38*/
39#define AMD_64_SMM_ADDR 0xC0010112
40
41/*
42 See Appendix A.8, "System Management Mode MSR Cross-Reference".
43
44 SMM_MASK Contains a mask which determines the size of
45 the protected area for the SMM handler.
46
47 Specific usage, see AMD64 Architecture Programmer’s Manual,
48 Volumes 2 (Rev. 3.37), Section 10.2.5
49
50 Reset value: 0000_0000_0000_0000h
51
52*/
53#define AMD_64_SMM_MASK 0xC0010113
54
55#endif // AMD_ARCHITECTURAL_MSR_H_