TianoCore EDK2 master
Cpuid.h
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1
18#ifndef __AMD_CPUID_H__
19#define __AMD_CPUID_H__
20
38#define CPUID_SIGNATURE_AUTHENTIC_AMD_EBX SIGNATURE_32 ('A', 'u', 't', 'h')
39#define CPUID_SIGNATURE_AUTHENTIC_AMD_EDX SIGNATURE_32 ('e', 'n', 't', 'i')
40#define CPUID_SIGNATURE_AUTHENTIC_AMD_ECX SIGNATURE_32 ('c', 'A', 'M', 'D')
44
64typedef union {
68 struct {
72 UINT32 Stepping : 4;
76 UINT32 BaseModel : 4;
80 UINT32 BaseFamily : 4;
84 UINT32 Reserved1 : 4;
88 UINT32 ExtModel : 4;
92 UINT32 ExtFamily : 8;
96 UINT32 Reserved2 : 4;
97 } Bits;
101 UINT32 Uint32;
103
108typedef union {
112 struct {
116 UINT32 Reserved : 28;
120 UINT32 PkgType : 4;
121 } Bits;
125 UINT32 Uint32;
127
132typedef union {
136 struct {
140 UINT32 LAHF_SAHF : 1;
144 UINT32 CmpLegacy : 1;
148 UINT32 SVM : 1;
152 UINT32 ExtApicSpace : 1;
156 UINT32 AltMovCr8 : 1;
160 UINT32 LZCNT : 1;
164 UINT32 SSE4A : 1;
168 UINT32 MisAlignSse : 1;
172 UINT32 PREFETCHW : 1;
176 UINT32 OSVW : 1;
180 UINT32 IBS : 1;
184 UINT32 XOP : 1;
188 UINT32 SKINIT : 1;
192 UINT32 WDT : 1;
196 UINT32 Reserved1 : 1;
200 UINT32 LWP : 1;
204 UINT32 FMA4 : 1;
208 UINT32 TCE : 1;
212 UINT32 Reserved2 : 4;
220 UINT32 PerfCtrExtCore : 1;
224 UINT32 Reserved3 : 2;
232 UINT32 PerfTsc : 1;
236 UINT32 PerfCtrExtL3 : 1;
240 UINT32 MwaitExtended : 1;
244 UINT32 Reserved4 : 2;
245 } Bits;
249 UINT32 Uint32;
251
256typedef union {
260 struct {
264 UINT32 FPU : 1;
268 UINT32 VME : 1;
272 UINT32 DE : 1;
276 UINT32 PSE : 1;
280 UINT32 TSC : 1;
284 UINT32 MSR : 1;
288 UINT32 PAE : 1;
292 UINT32 MCE : 1;
296 UINT32 CMPXCHG8B : 1;
300 UINT32 APIC : 1;
304 UINT32 Reserved1 : 1;
308 UINT32 SYSCALL_SYSRET : 1;
312 UINT32 MTRR : 1;
316 UINT32 PGE : 1;
320 UINT32 MCA : 1;
324 UINT32 CMOV : 1;
328 UINT32 PAT : 1;
332 UINT32 PSE36 : 1;
336 UINT32 Reserved2 : 2;
340 UINT32 NX : 1;
344 UINT32 Reserved3 : 1;
348 UINT32 MmxExt : 1;
352 UINT32 MMX : 1;
356 UINT32 FFSR : 1;
360 UINT32 FFXSR : 1;
364 UINT32 Page1GB : 1;
368 UINT32 RDTSCP : 1;
372 UINT32 Reserved4 : 1;
376 UINT32 LM : 1;
380 UINT32 ThreeDNow : 1;
384 UINT32 ThreeDNowExt : 1;
385 } Bits;
389 UINT32 Uint32;
391
410typedef union {
414 struct {
430 UINT32 Reserved : 8;
431 } Bits;
435 UINT32 Uint32;
437
442typedef union {
446 struct {
450 UINT32 CLZERO : 1;
454 UINT32 IRPerf : 1;
458 UINT32 XSaveErPtr : 1;
462 UINT32 Reserved : 29;
463 } Bits;
467 UINT32 Uint32;
469
474typedef union {
478 struct {
482 UINT32 NC : 8;
486 UINT32 Reserved1 : 4;
494 UINT32 PerfTscSize : 2;
498 UINT32 Reserved2 : 14;
499 } Bits;
503 UINT32 Uint32;
505
519#define CPUID_AMD_PROCESSOR_TOPOLOGY 0x8000001E
520
525typedef union {
529 struct {
534 } Bits;
538 UINT32 Uint32;
540
545typedef union {
549 struct {
553 UINT32 CoreId : 8;
557 UINT32 ThreadsPerCore : 8;
561 UINT32 Reserved : 16;
562 } Bits;
566 UINT32 Uint32;
568
573typedef union {
577 struct {
581 UINT32 NodeId : 8;
589 UINT32 Reserved : 21;
590 } Bits;
594 UINT32 Uint32;
596
620#define CPUID_MEMORY_ENCRYPTION_INFO 0x8000001F
621
626typedef union {
630 struct {
634 UINT32 SmeBit : 1;
635
639 UINT32 SevBit : 1;
640
644 UINT32 PageFlushMsrBit : 1;
645
649 UINT32 SevEsBit : 1;
650
654 UINT32 ReservedBits : 28;
655 } Bits;
659 UINT32 Uint32;
661
666typedef union {
670 struct {
674 UINT32 PtePosBits : 6;
675
680 UINT32 ReducedPhysBits : 5;
681
685 UINT32 ReservedBits : 21;
686 } Bits;
690 UINT32 Uint32;
692
697typedef union {
701 struct {
705 UINT32 NumGuests;
706 } Bits;
710 UINT32 Uint32;
712
717typedef union {
721 struct {
725 UINT32 MinAsid;
726 } Bits;
730 UINT32 Uint32;
732
733#endif