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Cpuid.h
Go to the documentation of this file.
1
20#ifndef __INTEL_CPUID_H__
21#define __INTEL_CPUID_H__
22
45#define CPUID_SIGNATURE 0x00
46
50#define CPUID_SIGNATURE_GENUINE_INTEL_EBX SIGNATURE_32 ('G', 'e', 'n', 'u')
51#define CPUID_SIGNATURE_GENUINE_INTEL_EDX SIGNATURE_32 ('i', 'n', 'e', 'I')
52#define CPUID_SIGNATURE_GENUINE_INTEL_ECX SIGNATURE_32 ('n', 't', 'e', 'l')
56
81#define CPUID_VERSION_INFO 0x01
82
87typedef union {
91 struct {
92 UINT32 SteppingId : 4;
93 UINT32 Model : 4;
94 UINT32 FamilyId : 4;
95 UINT32 ProcessorType : 2;
96 UINT32 Reserved1 : 2;
97 UINT32 ExtendedModelId : 4;
98 UINT32 ExtendedFamilyId : 8;
99 UINT32 Reserved2 : 4;
100 } Bits;
104 UINT32 Uint32;
106
110#define CPUID_VERSION_INFO_EAX_PROCESSOR_TYPE_ORIGINAL_OEM_PROCESSOR 0x00
111#define CPUID_VERSION_INFO_EAX_PROCESSOR_TYPE_INTEL_OVERDRIVE_PROCESSOR 0x01
112#define CPUID_VERSION_INFO_EAX_PROCESSOR_TYPE_DUAL_PROCESSOR 0x02
116
121typedef union {
125 struct {
130 UINT32 BrandIndex : 8;
136 UINT32 CacheLineSize : 8;
154 } Bits;
158 UINT32 Uint32;
160
165typedef union {
169 struct {
174 UINT32 SSE3 : 1;
179 UINT32 PCLMULQDQ : 1;
184 UINT32 DTES64 : 1;
189 UINT32 MONITOR : 1;
195 UINT32 DS_CPL : 1;
200 UINT32 VMX : 1;
205 UINT32 SMX : 1;
210 UINT32 EIST : 1;
215 UINT32 TM2 : 1;
221 UINT32 SSSE3 : 1;
228 UINT32 CNXT_ID : 1;
233 UINT32 SDBG : 1;
238 UINT32 FMA : 1;
243 UINT32 CMPXCHG16B : 1;
254 UINT32 PDCM : 1;
255 UINT32 Reserved : 1;
260 UINT32 PCID : 1;
265 UINT32 DCA : 1;
269 UINT32 SSE4_1 : 1;
273 UINT32 SSE4_2 : 1;
278 UINT32 x2APIC : 1;
283 UINT32 MOVBE : 1;
288 UINT32 POPCNT : 1;
293 UINT32 TSC_Deadline : 1;
298 UINT32 AESNI : 1;
304 UINT32 XSAVE : 1;
310 UINT32 OSXSAVE : 1;
315 UINT32 AVX : 1;
320 UINT32 F16C : 1;
324 UINT32 RDRAND : 1;
328 UINT32 ParaVirtualized : 1;
329 } Bits;
333 UINT32 Uint32;
335
340typedef union {
344 struct {
348 UINT32 FPU : 1;
356 UINT32 VME : 1;
362 UINT32 DE : 1;
369 UINT32 PSE : 1;
374 UINT32 TSC : 1;
380 UINT32 MSR : 1;
387 UINT32 PAE : 1;
397 UINT32 MCE : 1;
402 UINT32 CX8 : 1;
409 UINT32 APIC : 1;
410 UINT32 Reserved1 : 1;
415 UINT32 SEP : 1;
422 UINT32 MTRR : 1;
429 UINT32 PGE : 1;
436 UINT32 MCA : 1;
442 UINT32 CMOV : 1;
449 UINT32 PAT : 1;
457 UINT32 PSE_36 : 1;
462 UINT32 PSN : 1;
466 UINT32 CLFSH : 1;
467 UINT32 Reserved2 : 1;
474 UINT32 DS : 1;
481 UINT32 ACPI : 1;
486 UINT32 MMX : 1;
494 UINT32 FXSR : 1;
498 UINT32 SSE : 1;
502 UINT32 SSE2 : 1;
508 UINT32 SS : 1;
517 UINT32 HTT : 1;
522 UINT32 TM : 1;
523 UINT32 Reserved3 : 1;
531 UINT32 PBE : 1;
532 } Bits;
536 UINT32 Uint32;
538
710#define CPUID_CACHE_INFO 0x02
711
716typedef union {
720 struct {
721 UINT32 Reserved : 31;
726 UINT32 NotValid : 1;
727 } Bits;
731 UINT8 CacheDescriptor[4];
735 UINT32 Uint32;
737
764#define CPUID_SERIAL_NUMBER 0x03
765
802#define CPUID_CACHE_PARAMS 0x04
803
808typedef union {
812 struct {
817 UINT32 CacheType : 5;
821 UINT32 CacheLevel : 3;
833 UINT32 Reserved : 4;
856 } Bits;
860 UINT32 Uint32;
862
866#define CPUID_CACHE_PARAMS_CACHE_TYPE_NULL 0x00
867#define CPUID_CACHE_PARAMS_CACHE_TYPE_DATA 0x01
868#define CPUID_CACHE_PARAMS_CACHE_TYPE_INSTRUCTION 0x02
869#define CPUID_CACHE_PARAMS_CACHE_TYPE_UNIFIED 0x03
873
878typedef union {
882 struct {
887 UINT32 LineSize : 12;
892 UINT32 LinePartitions : 10;
897 UINT32 Ways : 10;
898 } Bits;
902 UINT32 Uint32;
904
909typedef union {
913 struct {
921 UINT32 Invalidate : 1;
935 UINT32 Reserved : 29;
936 } Bits;
940 UINT32 Uint32;
942
967#define CPUID_MONITOR_MWAIT 0x05
968
973typedef union {
977 struct {
983 UINT32 Reserved : 16;
984 } Bits;
988 UINT32 Uint32;
990
995typedef union {
999 struct {
1005 UINT32 Reserved : 16;
1006 } Bits;
1010 UINT32 Uint32;
1012
1017typedef union {
1021 struct {
1032 UINT32 Reserved : 30;
1033 } Bits;
1037 UINT32 Uint32;
1039
1048typedef union {
1052 struct {
1056 UINT32 C0States : 4;
1060 UINT32 C1States : 4;
1064 UINT32 C2States : 4;
1068 UINT32 C3States : 4;
1072 UINT32 C4States : 4;
1076 UINT32 C5States : 4;
1080 UINT32 C6States : 4;
1084 UINT32 C7States : 4;
1085 } Bits;
1089 UINT32 Uint32;
1091
1114#define CPUID_THERMAL_POWER_MANAGEMENT 0x06
1115
1120typedef union {
1124 struct {
1136 UINT32 ARAT : 1;
1137 UINT32 Reserved1 : 1;
1141 UINT32 PLN : 1;
1145 UINT32 ECMD : 1;
1149 UINT32 PTM : 1;
1154 UINT32 HWP : 1;
1171 UINT32 Reserved2 : 1;
1176 UINT32 HDC : 1;
1193 UINT32 FlexibleHWP : 1;
1197 UINT32 FastAccessMode : 1;
1198 UINT32 Reserved4 : 1;
1203 UINT32 Reserved5 : 11;
1204 } Bits;
1208 UINT32 Uint32;
1210
1215typedef union {
1219 struct {
1224 UINT32 Reserved : 28;
1225 } Bits;
1229 UINT32 Uint32;
1231
1236typedef union {
1240 struct {
1248 UINT32 Reserved1 : 2;
1255 UINT32 Reserved2 : 28;
1256 } Bits;
1260 UINT32 Uint32;
1262
1301#define CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS 0x07
1302
1306#define CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO 0x00
1307
1313typedef union {
1317 struct {
1321 UINT32 FSGSBASE : 1;
1330 UINT32 SGX : 1;
1335 UINT32 BMI1 : 1;
1339 UINT32 HLE : 1;
1343 UINT32 AVX2 : 1;
1351 UINT32 SMEP : 1;
1357 UINT32 BMI2 : 1;
1366 UINT32 INVPCID : 1;
1370 UINT32 RTM : 1;
1375 UINT32 RDT_M : 1;
1383 UINT32 MPX : 1;
1388 UINT32 RDT_A : 1;
1392 UINT32 AVX512F : 1;
1396 UINT32 AVX512DQ : 1;
1400 UINT32 RDSEED : 1;
1405 UINT32 ADX : 1;
1410 UINT32 SMAP : 1;
1414 UINT32 AVX512_IFMA : 1;
1415 UINT32 Reserved6 : 1;
1419 UINT32 CLFLUSHOPT : 1;
1423 UINT32 CLWB : 1;
1432 UINT32 AVX512PF : 1;
1436 UINT32 AVX512ER : 1;
1440 UINT32 AVX512CD : 1;
1445 UINT32 SHA : 1;
1449 UINT32 AVX512BW : 1;
1453 UINT32 AVX512VL : 1;
1454 } Bits;
1458 UINT32 Uint32;
1460
1466typedef union {
1470 struct {
1475 UINT32 PREFETCHWT1 : 1;
1479 UINT32 AVX512_VBMI : 1;
1483 UINT32 UMIP : 1;
1487 UINT32 PKU : 1;
1492 UINT32 OSPKE : 1;
1493 UINT32 Reserved8 : 8;
1498 UINT32 TME_EN : 1;
1503 UINT32 Reserved7 : 1;
1507 UINT32 FiveLevelPage : 1;
1512 UINT32 MAWAU : 5;
1516 UINT32 RDPID : 1;
1517 UINT32 Reserved3 : 7;
1521 UINT32 SGX_LC : 1;
1522 UINT32 Reserved4 : 1;
1523 } Bits;
1527 UINT32 Uint32;
1529
1535typedef union {
1539 struct {
1543 UINT32 Reserved1 : 2;
1547 UINT32 AVX512_4VNNIW : 1;
1551 UINT32 AVX512_4FMAPS : 1;
1555 UINT32 Reserved4 : 11;
1559 UINT32 Hybrid : 1;
1563 UINT32 Reserved5 : 10;
1599 } Bits;
1603 UINT32 Uint32;
1605
1623#define CPUID_DIRECT_CACHE_ACCESS_INFO 0x09
1624
1647#define CPUID_ARCHITECTURAL_PERFORMANCE_MONITORING 0x0A
1648
1653typedef union {
1657 struct {
1686 } Bits;
1690 UINT32 Uint32;
1692
1697typedef union {
1701 struct {
1730 UINT32 Reserved : 25;
1731 } Bits;
1735 UINT32 Uint32;
1737
1742typedef union {
1746 struct {
1757 UINT32 Reserved1 : 2;
1762 UINT32 Reserved2 : 16;
1763 } Bits;
1767 UINT32 Uint32;
1769
1815#define CPUID_EXTENDED_TOPOLOGY 0x0B
1816
1820typedef union {
1824 struct {
1834 UINT32 ApicIdShift : 5;
1835 UINT32 Reserved : 27;
1836 } Bits;
1840 UINT32 Uint32;
1842
1846typedef union {
1850 struct {
1863 UINT32 Reserved : 16;
1864 } Bits;
1868 UINT32 Uint32;
1870
1874typedef union {
1878 struct {
1882 UINT32 LevelNumber : 8;
1890 UINT32 LevelType : 8;
1891 UINT32 Reserved : 16;
1892 } Bits;
1896 UINT32 Uint32;
1898
1902#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID 0x00
1903#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT 0x01
1904#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE 0x02
1908
1918#define CPUID_EXTENDED_STATE 0x0D
1919
1953#define CPUID_EXTENDED_STATE_MAIN_LEAF 0x00
1954
1959typedef union {
1963 struct {
1967 UINT32 x87 : 1;
1971 UINT32 SSE : 1;
1975 UINT32 AVX : 1;
1979 UINT32 MPX : 2;
1983 UINT32 AVX_512 : 3;
1987 UINT32 IA32_XSS : 1;
1991 UINT32 PKRU : 1;
1992 UINT32 Reserved1 : 3;
1996 UINT32 IA32_XSS_2 : 1;
1997 UINT32 Reserved2 : 18;
1998 } Bits;
2002 UINT32 Uint32;
2004
2033#define CPUID_EXTENDED_STATE_SUB_LEAF 0x01
2034
2039typedef union {
2043 struct {
2047 UINT32 XSAVEOPT : 1;
2051 UINT32 XSAVEC : 1;
2055 UINT32 XGETBV : 1;
2059 UINT32 XSAVES : 1;
2060 UINT32 Reserved : 28;
2061 } Bits;
2065 UINT32 Uint32;
2067
2072typedef union {
2076 struct {
2080 UINT32 XCR0 : 1;
2084 UINT32 PT : 1;
2088 UINT32 XCR0_1 : 1;
2089 UINT32 Reserved1 : 3;
2093 UINT32 HWPState : 1;
2094 UINT32 Reserved8 : 18;
2095 } Bits;
2099 UINT32 Uint32;
2101
2147#define CPUID_EXTENDED_STATE_SIZE_OFFSET 0x02
2148
2153typedef union {
2157 struct {
2163 UINT32 XSS : 1;
2170 UINT32 Compacted : 1;
2171 UINT32 Reserved : 30;
2172 } Bits;
2176 UINT32 Uint32;
2178
2187#define CPUID_INTEL_RDT_MONITORING 0x0F
2188
2214#define CPUID_INTEL_RDT_MONITORING_ENUMERATION_SUB_LEAF 0x00
2215
2221typedef union {
2225 struct {
2226 UINT32 Reserved1 : 1;
2230 UINT32 L3CacheRDT_M : 1;
2231 UINT32 Reserved2 : 30;
2232 } Bits;
2236 UINT32 Uint32;
2238
2263#define CPUID_INTEL_RDT_MONITORING_L3_CACHE_SUB_LEAF 0x01
2264
2270typedef union {
2274 struct {
2287 UINT32 Reserved : 29;
2288 } Bits;
2292 UINT32 Uint32;
2294
2303#define CPUID_INTEL_RDT_ALLOCATION 0x10
2304
2327#define CPUID_INTEL_RDT_ALLOCATION_ENUMERATION_SUB_LEAF 0x00
2328
2334typedef union {
2338 struct {
2339 UINT32 Reserved1 : 1;
2352 UINT32 Reserved3 : 28;
2353 } Bits;
2357 UINT32 Uint32;
2359
2387#define CPUID_INTEL_RDT_ALLOCATION_L3_CACHE_SUB_LEAF 0x01
2388
2394typedef union {
2398 struct {
2403 UINT32 CapacityLength : 5;
2404 UINT32 Reserved : 27;
2405 } Bits;
2409 UINT32 Uint32;
2411
2417typedef union {
2421 struct {
2422 UINT32 Reserved3 : 2;
2427 UINT32 Reserved2 : 29;
2428 } Bits;
2432 UINT32 Uint32;
2434
2440typedef union {
2444 struct {
2448 UINT32 HighestCosNumber : 16;
2449 UINT32 Reserved : 16;
2450 } Bits;
2454 UINT32 Uint32;
2456
2482#define CPUID_INTEL_RDT_ALLOCATION_L2_CACHE_SUB_LEAF 0x02
2483
2489typedef union {
2493 struct {
2498 UINT32 CapacityLength : 5;
2499 UINT32 Reserved : 27;
2500 } Bits;
2504 UINT32 Uint32;
2506
2512typedef union {
2516 struct {
2520 UINT32 HighestCosNumber : 16;
2521 UINT32 Reserved : 16;
2522 } Bits;
2526 UINT32 Uint32;
2528
2560#define CPUID_INTEL_RDT_ALLOCATION_MEMORY_BANDWIDTH_SUB_LEAF 0x03
2561
2567typedef union {
2571 struct {
2577 UINT32 Reserved : 20;
2578 } Bits;
2582 UINT32 Uint32;
2584
2590typedef union {
2594 struct {
2598 UINT32 Reserved1 : 2;
2602 UINT32 Liner : 1;
2603 UINT32 Reserved2 : 29;
2604 } Bits;
2608 UINT32 Uint32;
2610
2616typedef union {
2620 struct {
2624 UINT32 HighestCosNumber : 16;
2625 UINT32 Reserved : 16;
2626 } Bits;
2630 UINT32 Uint32;
2632
2648#define CPUID_INTEL_SGX 0x12
2649
2677#define CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF 0x00
2678
2683typedef union {
2687 struct {
2691 UINT32 SGX1 : 1;
2695 UINT32 SGX2 : 1;
2696 UINT32 Reserved1 : 3;
2701 UINT32 ENCLV : 1;
2706 UINT32 ENCLS : 1;
2707 UINT32 Reserved2 : 25;
2708 } Bits;
2712 UINT32 Uint32;
2714
2719typedef union {
2723 struct {
2734 UINT32 Reserved : 16;
2735 } Bits;
2739 UINT32 Uint32;
2741
2776#define CPUID_INTEL_SGX_CAPABILITIES_1_SUB_LEAF 0x01
2777
2811#define CPUID_INTEL_SGX_CAPABILITIES_RESOURCES_SUB_LEAF 0x02
2812
2817typedef union {
2821 struct {
2829 UINT32 SubLeafType : 4;
2830 UINT32 Reserved : 8;
2836 } Bits;
2840 UINT32 Uint32;
2842
2847typedef union {
2851 struct {
2857 UINT32 Reserved : 12;
2858 } Bits;
2862 UINT32 Uint32;
2864
2869typedef union {
2873 struct {
2880 UINT32 EpcSection : 4;
2881 UINT32 Reserved : 8;
2887 } Bits;
2891 UINT32 Uint32;
2893
2898typedef union {
2902 struct {
2908 UINT32 Reserved : 12;
2909 } Bits;
2913 UINT32 Uint32;
2915
2924#define CPUID_INTEL_PROCESSOR_TRACE 0x14
2925
2951#define CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF 0x00
2952
2957typedef union {
2961 struct {
2966 UINT32 Cr3Filter : 1;
2981 UINT32 Mtc : 1;
2987 UINT32 PTWrite : 1;
2994 UINT32 Reserved : 26;
2995 } Bits;
2999 UINT32 Uint32;
3001
3006typedef union {
3010 struct {
3016 UINT32 RTIT : 1;
3022 UINT32 ToPA : 1;
3031 UINT32 Reserved : 27;
3036 UINT32 LIP : 1;
3037 } Bits;
3041 UINT32 Uint32;
3043
3077#define CPUID_INTEL_PROCESSOR_TRACE_SUB_LEAF 0x01
3078
3083typedef union {
3087 struct {
3092 UINT32 Reserved : 13;
3097 } Bits;
3101 UINT32 Uint32;
3103
3108typedef union {
3112 struct {
3121 } Bits;
3125 UINT32 Uint32;
3127
3159#define CPUID_TIME_STAMP_COUNTER 0x15
3160
3194#define CPUID_PROCESSOR_FREQUENCY 0x16
3195
3200typedef union {
3204 struct {
3209 UINT32 Reserved : 16;
3210 } Bits;
3214 UINT32 Uint32;
3216
3221typedef union {
3225 struct {
3229 UINT32 MaximumFrequency : 16;
3230 UINT32 Reserved : 16;
3231 } Bits;
3235 UINT32 Uint32;
3237
3242typedef union {
3246 struct {
3250 UINT32 BusFrequency : 16;
3251 UINT32 Reserved : 16;
3252 } Bits;
3256 UINT32 Uint32;
3258
3275#define CPUID_SOC_VENDOR 0x17
3276
3305#define CPUID_SOC_VENDOR_MAIN_LEAF 0x00
3306
3311typedef union {
3315 struct {
3319 UINT32 SocVendorId : 16;
3325 UINT32 IsVendorScheme : 1;
3326 UINT32 Reserved : 15;
3327 } Bits;
3331 UINT32 Uint32;
3333
3362#define CPUID_SOC_VENDOR_BRAND_STRING1 0x01
3363
3368typedef union {
3372 CHAR8 BrandString[4];
3376 UINT32 Uint32;
3378
3407#define CPUID_SOC_VENDOR_BRAND_STRING2 0x02
3408
3437#define CPUID_SOC_VENDOR_BRAND_STRING3 0x03
3438
3462#define CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS 0x18
3463
3491#define CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_MAIN_LEAF 0x00
3492
3496typedef union {
3500 struct {
3504 UINT32 Page4K : 1;
3508 UINT32 Page2M : 1;
3512 UINT32 Page4M : 1;
3516 UINT32 Page1G : 1;
3520 UINT32 Reserved1 : 4;
3525 UINT32 Partitioning : 3;
3529 UINT32 Reserved2 : 5;
3533 UINT32 Way : 16;
3534 } Bits;
3538 UINT32 Uint32;
3540
3544typedef union {
3548 struct {
3564 UINT32 Reserved1 : 5;
3569 UINT32 MaximumNum : 12;
3573 UINT32 Reserved2 : 6;
3574 } Bits;
3578 UINT32 Uint32;
3580
3584#define CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_TRANSLATION_CACHE_TYPE_INVALID 0x00
3585#define CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_TRANSLATION_CACHE_TYPE_DATA_TLB 0x01
3586#define CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_TRANSLATION_CACHE_TYPE_INSTRUCTION_TLB 0x02
3587#define CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_TRANSLATION_CACHE_TYPE_UNIFIED_TLB 0x03
3591
3616#define CPUID_HYBRID_INFORMATION 0x1A
3617
3621#define CPUID_HYBRID_INFORMATION_MAIN_LEAF 0x00
3622
3627typedef union {
3631 struct {
3640 UINT32 NativeModelId : 24;
3644 UINT32 CoreType : 8;
3645 } Bits;
3649 UINT32 Uint32;
3651
3655#define CPUID_CORE_TYPE_INTEL_ATOM 0x20
3656#define CPUID_CORE_TYPE_INTEL_CORE 0x40
3660
3685#define CPUID_V2_EXTENDED_TOPOLOGY 0x1F
3686
3692#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_MODULE 0x03
3693#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_TILE 0x04
3694#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_DIE 0x05
3698
3716#define CPUID_GUESTTD_RUNTIME_ENVIRONMENT 0x21
3717
3721#define CPUID_GUESTTD_SIGNATURE_GENUINE_INTEL_EBX SIGNATURE_32 ('I', 'n', 't', 'e')
3722#define CPUID_GUESTTD_SIGNATURE_GENUINE_INTEL_ECX SIGNATURE_32 (' ', ' ', ' ', ' ')
3723#define CPUID_GUESTTD_SIGNATURE_GENUINE_INTEL_EDX SIGNATURE_32 ('l', 'T', 'D', 'X')
3727
3745#define CPUID_EXTENDED_FUNCTION 0x80000000
3746
3768#define CPUID_EXTENDED_CPU_SIG 0x80000001
3769
3774typedef union {
3778 struct {
3782 UINT32 LAHF_SAHF : 1;
3783 UINT32 Reserved1 : 4;
3787 UINT32 LZCNT : 1;
3788 UINT32 Reserved2 : 2;
3792 UINT32 PREFETCHW : 1;
3793 UINT32 Reserved3 : 23;
3794 } Bits;
3798 UINT32 Uint32;
3800
3805typedef union {
3809 struct {
3810 UINT32 Reserved1 : 11;
3814 UINT32 SYSCALL_SYSRET : 1;
3815 UINT32 Reserved2 : 8;
3819 UINT32 NX : 1;
3820 UINT32 Reserved3 : 5;
3824 UINT32 Page1GB : 1;
3828 UINT32 RDTSCP : 1;
3829 UINT32 Reserved4 : 1;
3833 UINT32 LM : 1;
3834 UINT32 Reserved5 : 2;
3835 } Bits;
3839 UINT32 Uint32;
3841
3862#define CPUID_BRAND_STRING1 0x80000002
3863
3868typedef union {
3872 CHAR8 BrandString[4];
3876 UINT32 Uint32;
3878
3899#define CPUID_BRAND_STRING2 0x80000003
3900
3921#define CPUID_BRAND_STRING3 0x80000004
3922
3941#define CPUID_EXTENDED_CACHE_INFO 0x80000006
3942
3946typedef union {
3950 struct {
3954 UINT32 CacheLineSize : 8;
3955 UINT32 Reserved : 4;
3965 UINT32 CacheSize : 16;
3966 } Bits;
3970 UINT32 Uint32;
3972
3976#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_DISABLED 0x00
3977#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_DIRECT_MAPPED 0x01
3978#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_2_WAY 0x02
3979#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_4_WAY 0x04
3980#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_8_WAY 0x06
3981#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_16_WAY 0x08
3982#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_32_WAY 0x0A
3983#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_48_WAY 0x0B
3984#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_64_WAY 0x0C
3985#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_96_WAY 0x0D
3986#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_128_WAY 0x0E
3987#define CPUID_EXTENDED_CACHE_INFO_ECX_L2_ASSOCIATIVITY_FULL 0x0F
3991
4010#define CPUID_EXTENDED_TIME_STAMP_COUNTER 0x80000007
4011
4016typedef union {
4020 struct {
4021 UINT32 Reserved1 : 8;
4025 UINT32 InvariantTsc : 1;
4026 UINT32 Reserved2 : 23;
4027 } Bits;
4031 UINT32 Uint32;
4033
4052#define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008
4053
4058typedef union {
4062 struct {
4075 UINT32 Reserved : 16;
4076 } Bits;
4080 UINT32 Uint32;
4082
4083#endif
UINT32 SelfInitializingCache
Definition: Cpuid.h:825
UINT32 MaximumAddressableIdsForLogicalProcessors
Definition: Cpuid.h:843
UINT32 FullyAssociativeCache
Definition: Cpuid.h:829
UINT32 MaximumAddressableIdsForProcessorCores
Definition: Cpuid.h:855
UINT32 LinePartitions
Definition: Cpuid.h:892
UINT32 CacheInclusiveness
Definition: Cpuid.h:927
UINT32 ComplexCacheIndexing
Definition: Cpuid.h:934
UINT32 SmallestMonitorLineSize
Definition: Cpuid.h:982
UINT32 LargestMonitorLineSize
Definition: Cpuid.h:1004
UINT32 ExtensionsSupported
Definition: Cpuid.h:1026
UINT32 Reserved1
[Bits 15:14] Reserved
Definition: Cpuid.h:96
UINT32 ProcessorType
[Bits 13:12] Processor Type
Definition: Cpuid.h:95
UINT32 Reserved2
Reserved.
Definition: Cpuid.h:99
UINT32 ExtendedModelId
[Bits 19:16] Extended Model ID
Definition: Cpuid.h:97
UINT32 FamilyId
[Bits 11:8] Family
Definition: Cpuid.h:94
UINT32 Model
[Bits 7:4] Model
Definition: Cpuid.h:93
UINT32 SteppingId
[Bits 3:0] Stepping ID
Definition: Cpuid.h:92
UINT32 ExtendedFamilyId
[Bits 27:20] Extended Family ID
Definition: Cpuid.h:98
UINT32 MaximumAddressableIdsForLogicalProcessors
Definition: Cpuid.h:147
UINT32 CacheLineSize
Definition: Cpuid.h:136
UINT32 InitialLocalApicId
Definition: Cpuid.h:153
UINT32 xTPR_Update_Control
Definition: Cpuid.h:248
UINT32 ParaVirtualized
Definition: Cpuid.h:328