9#ifndef __INTEL_LOCAL_APIC_H__
10#define __INTEL_LOCAL_APIC_H__
15#define XAPIC_ID_OFFSET 0x20
16#define XAPIC_VERSION_OFFSET 0x30
17#define XAPIC_EOI_OFFSET 0x0b0
18#define XAPIC_ICR_DFR_OFFSET 0x0e0
19#define XAPIC_SPURIOUS_VECTOR_OFFSET 0x0f0
20#define XAPIC_ICR_LOW_OFFSET 0x300
21#define XAPIC_ICR_HIGH_OFFSET 0x310
22#define XAPIC_LVT_TIMER_OFFSET 0x320
23#define XAPIC_LVT_LINT0_OFFSET 0x350
24#define XAPIC_LVT_LINT1_OFFSET 0x360
25#define XAPIC_TIMER_INIT_COUNT_OFFSET 0x380
26#define XAPIC_TIMER_CURRENT_COUNT_OFFSET 0x390
27#define XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET 0x3E0
29#define X2APIC_MSR_BASE_ADDRESS 0x800
30#define X2APIC_MSR_ICR_ADDRESS 0x830
32#define LOCAL_APIC_DELIVERY_MODE_FIXED 0
33#define LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY 1
34#define LOCAL_APIC_DELIVERY_MODE_SMI 2
35#define LOCAL_APIC_DELIVERY_MODE_NMI 4
36#define LOCAL_APIC_DELIVERY_MODE_INIT 5
37#define LOCAL_APIC_DELIVERY_MODE_STARTUP 6
38#define LOCAL_APIC_DELIVERY_MODE_EXTINT 7
40#define LOCAL_APIC_DESTINATION_SHORTHAND_NO_SHORTHAND 0
41#define LOCAL_APIC_DESTINATION_SHORTHAND_SELF 1
42#define LOCAL_APIC_DESTINATION_SHORTHAND_ALL_INCLUDING_SELF 2
43#define LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF 3
UINT32 DivideValue1
Low 2 bits of the divide value.
UINT32 Reserved0
Always 0.
UINT32 DivideValue2
Highest 1 bit of the divide value.
UINT32 Reserved1
Reserved.
UINT32 Reserved0
Reserved.
UINT32 Destination
Specifies the target processor or processors in xAPIC mode.
UINT32 Uint32
Destination field expanded to 32-bit in x2APIC mode.
UINT32 TriggerMode
0: edge, 1: level when using the INIT level de-assert delivery mode.
UINT32 DestinationMode
0: physical destination mode, 1: logical destination mode.
UINT32 Vector
The vector number of the interrupt being sent.
UINT32 DeliveryMode
Specifies the type of IPI to be sent.
UINT32 Reserved1
Reserved.
UINT32 Level
0 for the INIT level de-assert delivery mode. Otherwise 1.
UINT32 Reserved2
Reserved.
UINT32 DestinationShorthand
A shorthand notation to specify the destination of the interrupt.
UINT32 Reserved0
Reserved.
UINT32 DeliveryStatus
Indicates the IPI delivery status. This field is reserved in x2APIC mode.
UINT32 Reserved1
Reserved.
UINT32 Reserved0
Reserved.
UINT32 TriggerMode
0:edge, 1:level.
UINT32 InputPinPolarity
Interrupt Input Pin Polarity.
UINT32 RemoteIrr
RO. Set when the local APIC accepts the interrupt and reset when an EOI is received.
UINT32 DeliveryMode
Specifies the type of interrupt to be sent.
UINT32 Mask
0: Not masked, 1: Masked.
UINT32 DeliveryStatus
0: Idle, 1: send pending.
UINT32 Vector
The vector number of the interrupt being sent.
UINT32 Reserved2
Reserved.
UINT32 Reserved0
Reserved.
UINT32 Vector
The vector number of the interrupt being sent.
UINT32 TimerMode
0: One-shot, 1: Periodic.
UINT32 DeliveryStatus
0: Idle, 1: send pending.
UINT32 Mask
0: Not masked, 1: Masked.
UINT32 Reserved1
Reserved.
UINT32 Reserved1
Reserved.
UINT32 RedirectionHint
Specifies the Redirection Hint.
UINT32 BaseAddress
Must be 0FEEH.
UINT32 Reserved0
Reserved.
UINT32 DestinationMode
Specifies the Destination Mode.
UINT32 DestinationId
Specifies the Destination ID.
UINT32 Reserved2
Reserved.
UINT32 DeliveryMode
Specifies the type of interrupt to be sent.
UINT32 Level
0:Deassert, 1:Assert. Ignored for Edge triggered interrupts.
UINT32 TriggerMode
0:Edge, 1:Level.
UINT32 Reserved1
Reserved.
UINT32 Vector
Interrupt vector in range 010h..0FEH.
UINT32 Reserved0
Reserved.
UINT32 SpuriousVector
Spurious Vector.
UINT32 SoftwareEnable
APIC Software Enable/Disable.
UINT32 FocusProcessorChecking
Focus Processor Checking.
UINT32 Reserved0
Reserved.
UINT32 Reserved1
Reserved.
UINT32 EoiBroadcastSuppression
EOI-Broadcast Suppression.
UINT32 MaxLvtEntry
Number of LVT entries minus 1.
UINT32 Reserved0
Reserved.
UINT32 Reserved1
Reserved.
UINT32 Version
The version numbers of the local APIC.
UINT32 EoiBroadcastSuppression
1 if EOI-broadcast suppression supported.