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PciLib.c
Go to the documentation of this file.
1
8#include <PiSmm.h>
10#include <Library/PciLib.h>
11#include <Library/DebugLib.h>
12#include <Library/BaseLib.h>
14
23#define ASSERT_INVALID_PCI_ADDRESS(A, M) \
24 ASSERT (((A) & (~0xfffffff | (M))) == 0)
25
33#define PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS(A) \
34 ((((A) << 4) & 0xff000000) | (((A) >> 4) & 0x00000700) | (((A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))
35
36//
37// Global variable to cache pointer to PCI Root Bridge I/O protocol.
38//
39EFI_SMM_PCI_ROOT_BRIDGE_IO_PROTOCOL *mSmmPciRootBridgeIo = NULL;
40
54EFIAPI
56 IN EFI_HANDLE ImageHandle,
57 IN EFI_SYSTEM_TABLE *SystemTable
58 )
59{
60 EFI_STATUS Status;
61
62 Status = gSmst->SmmLocateProtocol (&gEfiSmmPciRootBridgeIoProtocolGuid, NULL, (VOID **)&mSmmPciRootBridgeIo);
63 ASSERT_EFI_ERROR (Status);
64 ASSERT (mSmmPciRootBridgeIo != NULL);
65
66 return EFI_SUCCESS;
67}
68
83UINT32
85 IN UINTN Address,
87 )
88{
89 UINT32 Data;
90
91 mSmmPciRootBridgeIo->Pci.Read (
92 mSmmPciRootBridgeIo,
93 Width,
95 1,
96 &Data
97 );
98
99 return Data;
100}
101
118UINT32
120 IN UINTN Address,
122 IN UINT32 Data
123 )
124{
125 mSmmPciRootBridgeIo->Pci.Write (
126 mSmmPciRootBridgeIo,
127 Width,
129 1,
130 &Data
131 );
132 return Data;
133}
134
156RETURN_STATUS
157EFIAPI
159 IN UINTN Address
160 )
161{
162 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
163 return RETURN_UNSUPPORTED;
164}
165
181UINT8
182EFIAPI
184 IN UINTN Address
185 )
186{
187 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
188
189 return (UINT8)SmmPciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);
190}
191
208UINT8
209EFIAPI
211 IN UINTN Address,
212 IN UINT8 Value
213 )
214{
215 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
216
217 return (UINT8)SmmPciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);
218}
219
240UINT8
241EFIAPI
243 IN UINTN Address,
244 IN UINT8 OrData
245 )
246{
247 return PciWrite8 (Address, (UINT8)(PciRead8 (Address) | OrData));
248}
249
270UINT8
271EFIAPI
273 IN UINTN Address,
274 IN UINT8 AndData
275 )
276{
277 return PciWrite8 (Address, (UINT8)(PciRead8 (Address) & AndData));
278}
279
302UINT8
303EFIAPI
305 IN UINTN Address,
306 IN UINT8 AndData,
307 IN UINT8 OrData
308 )
309{
310 return PciWrite8 (Address, (UINT8)((PciRead8 (Address) & AndData) | OrData));
311}
312
334UINT8
335EFIAPI
337 IN UINTN Address,
338 IN UINTN StartBit,
339 IN UINTN EndBit
340 )
341{
342 return BitFieldRead8 (PciRead8 (Address), StartBit, EndBit);
343}
344
369UINT8
370EFIAPI
372 IN UINTN Address,
373 IN UINTN StartBit,
374 IN UINTN EndBit,
375 IN UINT8 Value
376 )
377{
378 return PciWrite8 (
379 Address,
380 BitFieldWrite8 (PciRead8 (Address), StartBit, EndBit, Value)
381 );
382}
383
411UINT8
412EFIAPI
414 IN UINTN Address,
415 IN UINTN StartBit,
416 IN UINTN EndBit,
417 IN UINT8 OrData
418 )
419{
420 return PciWrite8 (
421 Address,
422 BitFieldOr8 (PciRead8 (Address), StartBit, EndBit, OrData)
423 );
424}
425
453UINT8
454EFIAPI
456 IN UINTN Address,
457 IN UINTN StartBit,
458 IN UINTN EndBit,
459 IN UINT8 AndData
460 )
461{
462 return PciWrite8 (
463 Address,
464 BitFieldAnd8 (PciRead8 (Address), StartBit, EndBit, AndData)
465 );
466}
467
499UINT8
500EFIAPI
502 IN UINTN Address,
503 IN UINTN StartBit,
504 IN UINTN EndBit,
505 IN UINT8 AndData,
506 IN UINT8 OrData
507 )
508{
509 return PciWrite8 (
510 Address,
511 BitFieldAndThenOr8 (PciRead8 (Address), StartBit, EndBit, AndData, OrData)
512 );
513}
514
531UINT16
532EFIAPI
534 IN UINTN Address
535 )
536{
537 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
538
539 return (UINT16)SmmPciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);
540}
541
559UINT16
560EFIAPI
562 IN UINTN Address,
563 IN UINT16 Value
564 )
565{
566 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
567
568 return (UINT16)SmmPciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);
569}
570
592UINT16
593EFIAPI
595 IN UINTN Address,
596 IN UINT16 OrData
597 )
598{
599 return PciWrite16 (Address, (UINT16)(PciRead16 (Address) | OrData));
600}
601
623UINT16
624EFIAPI
626 IN UINTN Address,
627 IN UINT16 AndData
628 )
629{
630 return PciWrite16 (Address, (UINT16)(PciRead16 (Address) & AndData));
631}
632
656UINT16
657EFIAPI
659 IN UINTN Address,
660 IN UINT16 AndData,
661 IN UINT16 OrData
662 )
663{
664 return PciWrite16 (Address, (UINT16)((PciRead16 (Address) & AndData) | OrData));
665}
666
689UINT16
690EFIAPI
692 IN UINTN Address,
693 IN UINTN StartBit,
694 IN UINTN EndBit
695 )
696{
697 return BitFieldRead16 (PciRead16 (Address), StartBit, EndBit);
698}
699
725UINT16
726EFIAPI
728 IN UINTN Address,
729 IN UINTN StartBit,
730 IN UINTN EndBit,
731 IN UINT16 Value
732 )
733{
734 return PciWrite16 (
735 Address,
736 BitFieldWrite16 (PciRead16 (Address), StartBit, EndBit, Value)
737 );
738}
739
768UINT16
769EFIAPI
771 IN UINTN Address,
772 IN UINTN StartBit,
773 IN UINTN EndBit,
774 IN UINT16 OrData
775 )
776{
777 return PciWrite16 (
778 Address,
779 BitFieldOr16 (PciRead16 (Address), StartBit, EndBit, OrData)
780 );
781}
782
811UINT16
812EFIAPI
814 IN UINTN Address,
815 IN UINTN StartBit,
816 IN UINTN EndBit,
817 IN UINT16 AndData
818 )
819{
820 return PciWrite16 (
821 Address,
822 BitFieldAnd16 (PciRead16 (Address), StartBit, EndBit, AndData)
823 );
824}
825
858UINT16
859EFIAPI
861 IN UINTN Address,
862 IN UINTN StartBit,
863 IN UINTN EndBit,
864 IN UINT16 AndData,
865 IN UINT16 OrData
866 )
867{
868 return PciWrite16 (
869 Address,
870 BitFieldAndThenOr16 (PciRead16 (Address), StartBit, EndBit, AndData, OrData)
871 );
872}
873
890UINT32
891EFIAPI
893 IN UINTN Address
894 )
895{
896 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
897
898 return SmmPciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint32);
899}
900
918UINT32
919EFIAPI
921 IN UINTN Address,
922 IN UINT32 Value
923 )
924{
925 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
926
927 return SmmPciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint32, Value);
928}
929
951UINT32
952EFIAPI
954 IN UINTN Address,
955 IN UINT32 OrData
956 )
957{
958 return PciWrite32 (Address, PciRead32 (Address) | OrData);
959}
960
982UINT32
983EFIAPI
985 IN UINTN Address,
986 IN UINT32 AndData
987 )
988{
989 return PciWrite32 (Address, PciRead32 (Address) & AndData);
990}
991
1015UINT32
1016EFIAPI
1018 IN UINTN Address,
1019 IN UINT32 AndData,
1020 IN UINT32 OrData
1021 )
1022{
1023 return PciWrite32 (Address, (PciRead32 (Address) & AndData) | OrData);
1024}
1025
1048UINT32
1049EFIAPI
1051 IN UINTN Address,
1052 IN UINTN StartBit,
1053 IN UINTN EndBit
1054 )
1055{
1056 return BitFieldRead32 (PciRead32 (Address), StartBit, EndBit);
1057}
1058
1084UINT32
1085EFIAPI
1087 IN UINTN Address,
1088 IN UINTN StartBit,
1089 IN UINTN EndBit,
1090 IN UINT32 Value
1091 )
1092{
1093 return PciWrite32 (
1094 Address,
1095 BitFieldWrite32 (PciRead32 (Address), StartBit, EndBit, Value)
1096 );
1097}
1098
1127UINT32
1128EFIAPI
1130 IN UINTN Address,
1131 IN UINTN StartBit,
1132 IN UINTN EndBit,
1133 IN UINT32 OrData
1134 )
1135{
1136 return PciWrite32 (
1137 Address,
1138 BitFieldOr32 (PciRead32 (Address), StartBit, EndBit, OrData)
1139 );
1140}
1141
1170UINT32
1171EFIAPI
1173 IN UINTN Address,
1174 IN UINTN StartBit,
1175 IN UINTN EndBit,
1176 IN UINT32 AndData
1177 )
1178{
1179 return PciWrite32 (
1180 Address,
1181 BitFieldAnd32 (PciRead32 (Address), StartBit, EndBit, AndData)
1182 );
1183}
1184
1217UINT32
1218EFIAPI
1220 IN UINTN Address,
1221 IN UINTN StartBit,
1222 IN UINTN EndBit,
1223 IN UINT32 AndData,
1224 IN UINT32 OrData
1225 )
1226{
1227 return PciWrite32 (
1228 Address,
1229 BitFieldAndThenOr32 (PciRead32 (Address), StartBit, EndBit, AndData, OrData)
1230 );
1231}
1232
1256UINTN
1257EFIAPI
1259 IN UINTN StartAddress,
1260 IN UINTN Size,
1261 OUT VOID *Buffer
1262 )
1263{
1264 UINTN ReturnValue;
1265
1266 ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
1267 ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
1268
1269 if (Size == 0) {
1270 return Size;
1271 }
1272
1273 ASSERT (Buffer != NULL);
1274
1275 //
1276 // Save Size for return
1277 //
1278 ReturnValue = Size;
1279
1280 if ((StartAddress & BIT0) != 0) {
1281 //
1282 // Read a byte if StartAddress is byte aligned
1283 //
1284 *(volatile UINT8 *)Buffer = PciRead8 (StartAddress);
1285 StartAddress += sizeof (UINT8);
1286 Size -= sizeof (UINT8);
1287 Buffer = (UINT8 *)Buffer + 1;
1288 }
1289
1290 if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
1291 //
1292 // Read a word if StartAddress is word aligned
1293 //
1294 WriteUnaligned16 (Buffer, PciRead16 (StartAddress));
1295 StartAddress += sizeof (UINT16);
1296 Size -= sizeof (UINT16);
1297 Buffer = (UINT16 *)Buffer + 1;
1298 }
1299
1300 while (Size >= sizeof (UINT32)) {
1301 //
1302 // Read as many double words as possible
1303 //
1304 WriteUnaligned32 (Buffer, PciRead32 (StartAddress));
1305 StartAddress += sizeof (UINT32);
1306 Size -= sizeof (UINT32);
1307 Buffer = (UINT32 *)Buffer + 1;
1308 }
1309
1310 if (Size >= sizeof (UINT16)) {
1311 //
1312 // Read the last remaining word if exist
1313 //
1314 WriteUnaligned16 (Buffer, PciRead16 (StartAddress));
1315 StartAddress += sizeof (UINT16);
1316 Size -= sizeof (UINT16);
1317 Buffer = (UINT16 *)Buffer + 1;
1318 }
1319
1320 if (Size >= sizeof (UINT8)) {
1321 //
1322 // Read the last remaining byte if exist
1323 //
1324 *(volatile UINT8 *)Buffer = PciRead8 (StartAddress);
1325 }
1326
1327 return ReturnValue;
1328}
1329
1354UINTN
1355EFIAPI
1357 IN UINTN StartAddress,
1358 IN UINTN Size,
1359 IN VOID *Buffer
1360 )
1361{
1362 UINTN ReturnValue;
1363
1364 ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
1365 ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
1366
1367 if (Size == 0) {
1368 return 0;
1369 }
1370
1371 ASSERT (Buffer != NULL);
1372
1373 //
1374 // Save Size for return
1375 //
1376 ReturnValue = Size;
1377
1378 if ((StartAddress & BIT0) != 0) {
1379 //
1380 // Write a byte if StartAddress is byte aligned
1381 //
1382 PciWrite8 (StartAddress, *(UINT8 *)Buffer);
1383 StartAddress += sizeof (UINT8);
1384 Size -= sizeof (UINT8);
1385 Buffer = (UINT8 *)Buffer + 1;
1386 }
1387
1388 if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
1389 //
1390 // Write a word if StartAddress is word aligned
1391 //
1392 PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));
1393 StartAddress += sizeof (UINT16);
1394 Size -= sizeof (UINT16);
1395 Buffer = (UINT16 *)Buffer + 1;
1396 }
1397
1398 while (Size >= sizeof (UINT32)) {
1399 //
1400 // Write as many double words as possible
1401 //
1402 PciWrite32 (StartAddress, ReadUnaligned32 (Buffer));
1403 StartAddress += sizeof (UINT32);
1404 Size -= sizeof (UINT32);
1405 Buffer = (UINT32 *)Buffer + 1;
1406 }
1407
1408 if (Size >= sizeof (UINT16)) {
1409 //
1410 // Write the last remaining word if exist
1411 //
1412 PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));
1413 StartAddress += sizeof (UINT16);
1414 Size -= sizeof (UINT16);
1415 Buffer = (UINT16 *)Buffer + 1;
1416 }
1417
1418 if (Size >= sizeof (UINT8)) {
1419 //
1420 // Write the last remaining byte if exist
1421 //
1422 PciWrite8 (StartAddress, *(UINT8 *)Buffer);
1423 }
1424
1425 return ReturnValue;
1426}
UINT64 UINTN
UINT32 EFIAPI BitFieldAnd32(IN UINT32 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData)
Definition: BitField.c:639
UINT16 EFIAPI BitFieldAnd16(IN UINT16 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData)
Definition: BitField.c:447
UINT8 EFIAPI BitFieldAndThenOr8(IN UINT8 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData)
Definition: BitField.c:296
UINT32 EFIAPI BitFieldAndThenOr32(IN UINT32 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData)
Definition: BitField.c:680
UINT32 EFIAPI BitFieldWrite32(IN UINT32 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value)
Definition: BitField.c:563
UINT16 EFIAPI BitFieldAndThenOr16(IN UINT16 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData)
Definition: BitField.c:488
UINT32 EFIAPI BitFieldOr32(IN UINT32 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
Definition: BitField.c:601
UINT16 EFIAPI ReadUnaligned16(IN CONST UINT16 *Buffer)
Definition: Unaligned.c:29
UINT8 EFIAPI BitFieldWrite8(IN UINT8 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value)
Definition: BitField.c:179
UINT8 EFIAPI BitFieldRead8(IN UINT8 Operand, IN UINTN StartBit, IN UINTN EndBit)
Definition: BitField.c:143
UINT8 EFIAPI BitFieldAnd8(IN UINT8 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
Definition: BitField.c:255
UINT32 EFIAPI WriteUnaligned32(OUT UINT32 *Buffer, IN UINT32 Value)
Definition: Unaligned.c:177
UINT16 EFIAPI BitFieldWrite16(IN UINT16 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
Definition: BitField.c:371
UINT16 EFIAPI WriteUnaligned16(OUT UINT16 *Buffer, IN UINT16 Value)
Definition: Unaligned.c:61
UINT16 EFIAPI BitFieldOr16(IN UINT16 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData)
Definition: BitField.c:409
UINT16 EFIAPI BitFieldRead16(IN UINT16 Operand, IN UINTN StartBit, IN UINTN EndBit)
Definition: BitField.c:335
UINT8 EFIAPI BitFieldOr8(IN UINT8 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
Definition: BitField.c:217
UINT32 EFIAPI BitFieldRead32(IN UINT32 Operand, IN UINTN StartBit, IN UINTN EndBit)
Definition: BitField.c:527
UINT32 EFIAPI ReadUnaligned32(IN CONST UINT32 *Buffer)
Definition: Unaligned.c:145
#define NULL
Definition: Base.h:319
#define RETURN_UNSUPPORTED
Definition: Base.h:1081
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define ASSERT_EFI_ERROR(StatusParameter)
Definition: DebugLib.h:462
UINT16 EFIAPI PciBitFieldOr16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData)
Definition: PciLib.c:626
UINTN EFIAPI PciWriteBuffer(IN UINTN StartAddress, IN UINTN Size, IN VOID *Buffer)
Definition: PciLib.c:1124
UINT32 EFIAPI PciBitFieldWrite32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value)
Definition: PciLib.c:929
UINT32 EFIAPI PciAndThenOr32(IN UINTN Address, IN UINT32 AndData, IN UINT32 OrData)
Definition: PciLib.c:860
UINT32 EFIAPI PciBitFieldOr32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
Definition: PciLib.c:969
UINT32 EFIAPI PciRead32(IN UINTN Address)
Definition: PciLib.c:739
UINT32 EFIAPI PciOr32(IN UINTN Address, IN UINT32 OrData)
Definition: PciLib.c:796
UINT8 EFIAPI PciBitFieldWrite8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value)
Definition: PciLib.c:246
RETURN_STATUS EFIAPI PciRegisterForRuntimeAccess(IN UINTN Address)
Definition: PciLib.c:38
UINT8 EFIAPI PciRead8(IN UINTN Address)
Definition: PciLib.c:62
UINT8 EFIAPI PciAnd8(IN UINTN Address, IN UINT8 AndData)
Definition: PciLib.c:147
UINT8 EFIAPI PciOr8(IN UINTN Address, IN UINT8 OrData)
Definition: PciLib.c:117
UINT16 EFIAPI PciAnd16(IN UINTN Address, IN UINT16 AndData)
Definition: PciLib.c:484
UINT32 EFIAPI PciWrite32(IN UINTN Address, IN UINT32 Value)
Definition: PciLib.c:765
UINT16 EFIAPI PciOr16(IN UINTN Address, IN UINT16 OrData)
Definition: PciLib.c:453
UINT16 EFIAPI PciBitFieldAnd16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData)
Definition: PciLib.c:666
UINT32 EFIAPI PciBitFieldAnd32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData)
Definition: PciLib.c:1009
UINT32 EFIAPI PciBitFieldRead32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
Definition: PciLib.c:893
UINT16 EFIAPI PciBitFieldAndThenOr16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData)
Definition: PciLib.c:710
UINT8 EFIAPI PciAndThenOr8(IN UINTN Address, IN UINT8 AndData, IN UINT8 OrData)
Definition: PciLib.c:179
UINT8 EFIAPI PciWrite8(IN UINTN Address, IN UINT8 Value)
Definition: PciLib.c:87
UINT16 EFIAPI PciWrite16(IN UINTN Address, IN UINT16 Value)
Definition: PciLib.c:422
UINT16 EFIAPI PciBitFieldRead16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
Definition: PciLib.c:550
UINT16 EFIAPI PciBitFieldWrite16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
Definition: PciLib.c:586
UINT8 EFIAPI PciBitFieldAnd8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
Definition: PciLib.c:324
UINT8 EFIAPI PciBitFieldAndThenOr8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData)
Definition: PciLib.c:367
UINT8 EFIAPI PciBitFieldOr8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
Definition: PciLib.c:285
UINT32 EFIAPI PciAnd32(IN UINTN Address, IN UINT32 AndData)
Definition: PciLib.c:827
UINT32 EFIAPI PciBitFieldAndThenOr32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData)
Definition: PciLib.c:1053
UINT8 EFIAPI PciBitFieldRead8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
Definition: PciLib.c:211
UINT16 EFIAPI PciAndThenOr16(IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
Definition: PciLib.c:517
UINTN EFIAPI PciReadBuffer(IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer)
Definition: PciLib.c:1089
UINT16 EFIAPI PciRead16(IN UINTN Address)
Definition: PciLib.c:396
#define ASSERT_INVALID_PCI_ADDRESS(A, M)
Definition: PciLib.c:27
UINT32 SmmPciLibPciRootBridgeIoReadWorker(IN UINTN Address, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width)
Definition: PciLib.c:84
UINT32 SmmPciLibPciRootBridgeIoWriteWorker(IN UINTN Address, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT32 Data)
Definition: PciLib.c:119
EFI_STATUS EFIAPI PciLibConstructor(IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable)
Definition: PciLib.c:55
#define PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS(A)
Definition: PciLib.c:33
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
EFI_SMM_SYSTEM_TABLE2 * gSmst
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
VOID * EFI_HANDLE
Definition: UefiBaseType.h:33
#define EFI_SUCCESS
Definition: UefiBaseType.h:112
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read