PciSegmentLib.c

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#include "PciSegmentLib.h"
 
//
// Global variable to record data of PCI Root Bridge I/O Protocol instances
//
PCI_ROOT_BRIDGE_DATA  *mPciRootBridgeData     = NULL;
UINTN                 mNumberOfPciRootBridges = 0;
 
EFI_STATUS
EFIAPI
PciSegmentLibConstructor (
  IN EFI_HANDLE        ImageHandle,
  IN EFI_SYSTEM_TABLE  *SystemTable
  )
{
  EFI_STATUS                         Status;
  UINTN                              Index;
  UINTN                              HandleCount;
  EFI_HANDLE                         *HandleBuffer;
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *PciRootBridgeIo;
  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR  *Descriptors;
 
  HandleCount     = 0;
  HandleBuffer    = NULL;
  PciRootBridgeIo = NULL;
  Descriptors     = NULL;
 
  Status = gBS->LocateHandleBuffer (
                  ByProtocol,
                  &gEfiPciRootBridgeIoProtocolGuid,
                  NULL,
                  &HandleCount,
                  &HandleBuffer
                  );
  ASSERT_EFI_ERROR (Status);
 
  mNumberOfPciRootBridges = HandleCount;
 
  mPciRootBridgeData = AllocatePool (HandleCount * sizeof (PCI_ROOT_BRIDGE_DATA));
  ASSERT (mPciRootBridgeData != NULL);
 
  //
  // Traverse all PCI Root Bridge I/O Protocol instances, and record the protocol
  // instances, together with their segment numbers and bus ranges.
  //
  for (Index = 0; Index < HandleCount; Index++) {
    Status = gBS->HandleProtocol (
                    HandleBuffer[Index],
                    &gEfiPciRootBridgeIoProtocolGuid,
                    (VOID **)&PciRootBridgeIo
                    );
    ASSERT_EFI_ERROR (Status);
 
    mPciRootBridgeData[Index].PciRootBridgeIo = PciRootBridgeIo;
    mPciRootBridgeData[Index].SegmentNumber   = PciRootBridgeIo->SegmentNumber;
 
    Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **)&Descriptors);
    ASSERT_EFI_ERROR (Status);
 
    while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) {
      if (Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) {
        mPciRootBridgeData[Index].MinBusNumber = Descriptors->AddrRangeMin;
        mPciRootBridgeData[Index].MaxBusNumber = Descriptors->AddrRangeMax;
        break;
      }
 
      Descriptors++;
    }
 
    ASSERT (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR);
  }
 
  FreePool (HandleBuffer);
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
PciSegmentLibDestructor (
  IN EFI_HANDLE        ImageHandle,
  IN EFI_SYSTEM_TABLE  *SystemTable
  )
{
  FreePool (mPciRootBridgeData);
 
  return EFI_SUCCESS;
}
 
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *
PciSegmentLibSearchForRootBridge (
  IN UINT64  Address
  )
{
  UINTN   Index;
  UINT64  SegmentNumber;
  UINT64  BusNumber;
 
  for (Index = 0; Index < mNumberOfPciRootBridges; Index++) {
    //
    // Matches segment number of address with the segment number of protocol instance.
    //
    SegmentNumber = BitFieldRead64 (Address, 32, 63);
    if (SegmentNumber == mPciRootBridgeData[Index].SegmentNumber) {
      //
      // Matches the bus number of address with bus number range of protocol instance.
      //
      BusNumber = BitFieldRead64 (Address, 20, 27);
      if ((BusNumber >= mPciRootBridgeData[Index].MinBusNumber) && (BusNumber <= mPciRootBridgeData[Index].MaxBusNumber)) {
        return mPciRootBridgeData[Index].PciRootBridgeIo;
      }
    }
  }
 
  return NULL;
}
 
UINT32
DxePciSegmentLibPciRootBridgeIoReadWorker (
  IN  UINT64                                 Address,
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width
  )
{
  UINT32                           Data;
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *PciRootBridgeIo;
 
  PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
 
  if (PciRootBridgeIo == NULL) {
    ASSERT (PciRootBridgeIo != NULL);
    return 0;
  }
 
  PciRootBridgeIo->Pci.Read (
                         PciRootBridgeIo,
                         Width,
                         PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS (Address),
                         1,
                         &Data
                         );
 
  return Data;
}
 
UINT32
DxePciSegmentLibPciRootBridgeIoWriteWorker (
  IN  UINT64                                 Address,
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
  IN  UINT32                                 Data
  )
{
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *PciRootBridgeIo;
 
  PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
 
  if (PciRootBridgeIo == NULL) {
    ASSERT (PciRootBridgeIo != NULL);
    return 0;
  }
 
  PciRootBridgeIo->Pci.Write (
                         PciRootBridgeIo,
                         Width,
                         PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS (Address),
                         1,
                         &Data
                         );
 
  return Data;
}
 
RETURN_STATUS
EFIAPI
PciSegmentRegisterForRuntimeAccess (
  IN UINTN  Address
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
  return RETURN_UNSUPPORTED;
}
 
UINT8
EFIAPI
PciSegmentRead8 (
  IN UINT64  Address
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
 
  return (UINT8)DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);
}
 
UINT8
EFIAPI
PciSegmentWrite8 (
  IN UINT64  Address,
  IN UINT8   Value
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
 
  return (UINT8)DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);
}
 
UINT8
EFIAPI
PciSegmentOr8 (
  IN UINT64  Address,
  IN UINT8   OrData
  )
{
  return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) | OrData));
}
 
UINT8
EFIAPI
PciSegmentAnd8 (
  IN UINT64  Address,
  IN UINT8   AndData
  )
{
  return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) & AndData));
}
 
UINT8
EFIAPI
PciSegmentAndThenOr8 (
  IN UINT64  Address,
  IN UINT8   AndData,
  IN UINT8   OrData
  )
{
  return PciSegmentWrite8 (Address, (UINT8)((PciSegmentRead8 (Address) & AndData) | OrData));
}
 
UINT8
EFIAPI
PciSegmentBitFieldRead8 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit
  )
{
  return BitFieldRead8 (PciSegmentRead8 (Address), StartBit, EndBit);
}
 
UINT8
EFIAPI
PciSegmentBitFieldWrite8 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT8   Value
  )
{
  return PciSegmentWrite8 (
           Address,
           BitFieldWrite8 (PciSegmentRead8 (Address), StartBit, EndBit, Value)
           );
}
 
UINT8
EFIAPI
PciSegmentBitFieldOr8 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT8   OrData
  )
{
  return PciSegmentWrite8 (
           Address,
           BitFieldOr8 (PciSegmentRead8 (Address), StartBit, EndBit, OrData)
           );
}
 
UINT8
EFIAPI
PciSegmentBitFieldAnd8 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT8   AndData
  )
{
  return PciSegmentWrite8 (
           Address,
           BitFieldAnd8 (PciSegmentRead8 (Address), StartBit, EndBit, AndData)
           );
}
 
UINT8
EFIAPI
PciSegmentBitFieldAndThenOr8 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT8   AndData,
  IN UINT8   OrData
  )
{
  return PciSegmentWrite8 (
           Address,
           BitFieldAndThenOr8 (PciSegmentRead8 (Address), StartBit, EndBit, AndData, OrData)
           );
}
 
UINT16
EFIAPI
PciSegmentRead16 (
  IN UINT64  Address
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1);
 
  return (UINT16)DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);
}
 
UINT16
EFIAPI
PciSegmentWrite16 (
  IN UINT64  Address,
  IN UINT16  Value
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1);
 
  return (UINT16)DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);
}
 
UINT16
EFIAPI
PciSegmentOr16 (
  IN UINT64  Address,
  IN UINT16  OrData
  )
{
  return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) | OrData));
}
 
UINT16
EFIAPI
PciSegmentAnd16 (
  IN UINT64  Address,
  IN UINT16  AndData
  )
{
  return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) & AndData));
}
 
UINT16
EFIAPI
PciSegmentAndThenOr16 (
  IN UINT64  Address,
  IN UINT16  AndData,
  IN UINT16  OrData
  )
{
  return PciSegmentWrite16 (Address, (UINT16)((PciSegmentRead16 (Address) & AndData) | OrData));
}
 
UINT16
EFIAPI
PciSegmentBitFieldRead16 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit
  )
{
  return BitFieldRead16 (PciSegmentRead16 (Address), StartBit, EndBit);
}
 
UINT16
EFIAPI
PciSegmentBitFieldWrite16 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT16  Value
  )
{
  return PciSegmentWrite16 (
           Address,
           BitFieldWrite16 (PciSegmentRead16 (Address), StartBit, EndBit, Value)
           );
}
 
UINT16
EFIAPI
PciSegmentBitFieldOr16 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT16  OrData
  )
{
  return PciSegmentWrite16 (
           Address,
           BitFieldOr16 (PciSegmentRead16 (Address), StartBit, EndBit, OrData)
           );
}
 
UINT16
EFIAPI
PciSegmentBitFieldAnd16 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT16  AndData
  )
{
  return PciSegmentWrite16 (
           Address,
           BitFieldAnd16 (PciSegmentRead16 (Address), StartBit, EndBit, AndData)
           );
}
 
UINT16
EFIAPI
PciSegmentBitFieldAndThenOr16 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT16  AndData,
  IN UINT16  OrData
  )
{
  return PciSegmentWrite16 (
           Address,
           BitFieldAndThenOr16 (PciSegmentRead16 (Address), StartBit, EndBit, AndData, OrData)
           );
}
 
UINT32
EFIAPI
PciSegmentRead32 (
  IN UINT64  Address
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3);
 
  return DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint32);
}
 
UINT32
EFIAPI
PciSegmentWrite32 (
  IN UINT64  Address,
  IN UINT32  Value
  )
{
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3);
 
  return DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint32, Value);
}
 
UINT32
EFIAPI
PciSegmentOr32 (
  IN UINT64  Address,
  IN UINT32  OrData
  )
{
  return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) | OrData);
}
 
UINT32
EFIAPI
PciSegmentAnd32 (
  IN UINT64  Address,
  IN UINT32  AndData
  )
{
  return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) & AndData);
}
 
UINT32
EFIAPI
PciSegmentAndThenOr32 (
  IN UINT64  Address,
  IN UINT32  AndData,
  IN UINT32  OrData
  )
{
  return PciSegmentWrite32 (Address, (PciSegmentRead32 (Address) & AndData) | OrData);
}
 
UINT32
EFIAPI
PciSegmentBitFieldRead32 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit
  )
{
  return BitFieldRead32 (PciSegmentRead32 (Address), StartBit, EndBit);
}
 
UINT32
EFIAPI
PciSegmentBitFieldWrite32 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT32  Value
  )
{
  return PciSegmentWrite32 (
           Address,
           BitFieldWrite32 (PciSegmentRead32 (Address), StartBit, EndBit, Value)
           );
}
 
UINT32
EFIAPI
PciSegmentBitFieldOr32 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT32  OrData
  )
{
  return PciSegmentWrite32 (
           Address,
           BitFieldOr32 (PciSegmentRead32 (Address), StartBit, EndBit, OrData)
           );
}
 
UINT32
EFIAPI
PciSegmentBitFieldAnd32 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT32  AndData
  )
{
  return PciSegmentWrite32 (
           Address,
           BitFieldAnd32 (PciSegmentRead32 (Address), StartBit, EndBit, AndData)
           );
}
 
UINT32
EFIAPI
PciSegmentBitFieldAndThenOr32 (
  IN UINT64  Address,
  IN UINTN   StartBit,
  IN UINTN   EndBit,
  IN UINT32  AndData,
  IN UINT32  OrData
  )
{
  return PciSegmentWrite32 (
           Address,
           BitFieldAndThenOr32 (PciSegmentRead32 (Address), StartBit, EndBit, AndData, OrData)
           );
}
 
UINTN
EFIAPI
PciSegmentReadBuffer (
  IN  UINT64  StartAddress,
  IN  UINTN   Size,
  OUT VOID    *Buffer
  )
{
  UINTN  ReturnValue;
 
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
 
  if (Size == 0) {
    return Size;
  }
 
  ASSERT (Buffer != NULL);
 
  //
  // Save Size for return
  //
  ReturnValue = Size;
 
  if ((StartAddress & BIT0) != 0) {
    //
    // Read a byte if StartAddress is byte aligned
    //
    *(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress);
    StartAddress             += sizeof (UINT8);
    Size                     -= sizeof (UINT8);
    Buffer                    = (UINT8 *)Buffer + 1;
  }
 
  if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
    //
    // Read a word if StartAddress is word aligned
    //
    WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
    StartAddress += sizeof (UINT16);
    Size         -= sizeof (UINT16);
    Buffer        = (UINT16 *)Buffer + 1;
  }
 
  while (Size >= sizeof (UINT32)) {
    //
    // Read as many double words as possible
    //
    WriteUnaligned32 (Buffer, PciSegmentRead32 (StartAddress));
    StartAddress += sizeof (UINT32);
    Size         -= sizeof (UINT32);
    Buffer        = (UINT32 *)Buffer + 1;
  }
 
  if (Size >= sizeof (UINT16)) {
    //
    // Read the last remaining word if exist
    //
    WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
    StartAddress += sizeof (UINT16);
    Size         -= sizeof (UINT16);
    Buffer        = (UINT16 *)Buffer + 1;
  }
 
  if (Size >= sizeof (UINT8)) {
    //
    // Read the last remaining byte if exist
    //
    *(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress);
  }
 
  return ReturnValue;
}
 
UINTN
EFIAPI
PciSegmentWriteBuffer (
  IN UINT64  StartAddress,
  IN UINTN   Size,
  IN VOID    *Buffer
  )
{
  UINTN  ReturnValue;
 
  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
 
  if (Size == 0) {
    return 0;
  }
 
  ASSERT (Buffer != NULL);
 
  //
  // Save Size for return
  //
  ReturnValue = Size;
 
  if ((StartAddress & BIT0) != 0) {
    //
    // Write a byte if StartAddress is byte aligned
    //
    PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer);
    StartAddress += sizeof (UINT8);
    Size         -= sizeof (UINT8);
    Buffer        = (UINT8 *)Buffer + 1;
  }
 
  if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
    //
    // Write a word if StartAddress is word aligned
    //
    PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
    StartAddress += sizeof (UINT16);
    Size         -= sizeof (UINT16);
    Buffer        = (UINT16 *)Buffer + 1;
  }
 
  while (Size >= sizeof (UINT32)) {
    //
    // Write as many double words as possible
    //
    PciSegmentWrite32 (StartAddress, ReadUnaligned32 (Buffer));
    StartAddress += sizeof (UINT32);
    Size         -= sizeof (UINT32);
    Buffer        = (UINT32 *)Buffer + 1;
  }
 
  if (Size >= sizeof (UINT16)) {
    //
    // Write the last remaining word if exist
    //
    PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
    StartAddress += sizeof (UINT16);
    Size         -= sizeof (UINT16);
    Buffer        = (UINT16 *)Buffer + 1;
  }
 
  if (Size >= sizeof (UINT8)) {
    //
    // Write the last remaining byte if exist
    //
    PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer);
  }
 
  return ReturnValue;
}