#include <MdePkg/Include/Register/Amd/Cpuid.h>

Data Fields
struct {
UINT32 LAHF_SAHF: 1

UINT32 CmpLegacy: 1

UINT32 SVM: 1

UINT32 ExtApicSpace: 1

UINT32 AltMovCr8: 1

UINT32 LZCNT: 1

UINT32 SSE4A: 1

UINT32 MisAlignSse: 1

UINT32 PREFETCHW: 1

UINT32 OSVW: 1

UINT32 IBS: 1

UINT32 XOP: 1

UINT32 SKINIT: 1

UINT32 WDT: 1

UINT32 Reserved1: 1

UINT32 LWP: 1

UINT32 FMA4: 1

UINT32 TCE: 1

UINT32 Reserved2: 4

UINT32 TopologyExtensions: 1

UINT32 PerfCtrExtCore: 1

UINT32 Reserved3: 2

UINT32 DataBreakpointExtension: 1

UINT32 PerfTsc: 1

UINT32 PerfCtrExtL3: 1

UINT32 MwaitExtended: 1

UINT32 Reserved4: 2

}	Bits

UINT32	Uint32

Detailed Description

CPUID Extended Processor Signature and Features ECX for CPUID leaf CPUID_EXTENDED_CPU_SIG.

Definition at line 153 of file Cpuid.h.

Field Documentation

◆ AltMovCr8

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::AltMovCr8

[Bit 4] LOCK MOV CR0 means MOV CR8.

Definition at line 177 of file Cpuid.h.

◆

struct { ... } CPUID_AMD_EXTENDED_CPU_SIG_ECX::Bits

Individual bit fields

◆ CmpLegacy

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::CmpLegacy

[Bit 1] Core multi-processing legacy mode.

Definition at line 165 of file Cpuid.h.

◆ DataBreakpointExtension

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::DataBreakpointExtension

[Bit 26] Data Breakpoint Extension.

Definition at line 249 of file Cpuid.h.

◆ ExtApicSpace

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::ExtApicSpace

[Bit 3] Extended APIC register space.

Definition at line 173 of file Cpuid.h.

◆ FMA4

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::FMA4

[Bit 16] 4-Operand FMA instruction support.

Definition at line 225 of file Cpuid.h.

◆ IBS

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::IBS

[Bit 10] Instruction Based Sampling.

Definition at line 201 of file Cpuid.h.

◆ LAHF_SAHF

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::LAHF_SAHF

[Bit 0] LAHF/SAHF available in 64-bit mode.

Definition at line 161 of file Cpuid.h.

◆ LWP

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::LWP

[Bit 15] Lightweight Profiling support.

Definition at line 221 of file Cpuid.h.

◆ LZCNT

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::LZCNT

[Bit 5] LZCNT instruction support.

Definition at line 181 of file Cpuid.h.

◆ MisAlignSse

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::MisAlignSse

[Bit 7] Misaligned SSE Mode.

Definition at line 189 of file Cpuid.h.

◆ MwaitExtended

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::MwaitExtended

[Bit 29] MWAITX and MONITORX capability.

Definition at line 261 of file Cpuid.h.

◆ OSVW

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::OSVW

[Bit 9] OS Visible Work-around support.

Definition at line 197 of file Cpuid.h.

◆ PerfCtrExtCore

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::PerfCtrExtCore

[Bit 23] Core Performance Counter Extensions.

Definition at line 241 of file Cpuid.h.

◆ PerfCtrExtL3

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::PerfCtrExtL3

[Bit 28] L3 Performance Counter Extensions.

Definition at line 257 of file Cpuid.h.

◆ PerfTsc

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::PerfTsc

[Bit 27] Performance Time-Stamp Counter.

Definition at line 253 of file Cpuid.h.

◆ PREFETCHW

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::PREFETCHW

[Bit 8] ThreeDNow Prefetch instructions.

Definition at line 193 of file Cpuid.h.

◆ Reserved1

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::Reserved1

[Bit 14] Reserved.

Definition at line 217 of file Cpuid.h.

◆ Reserved2

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::Reserved2

[Bit 21:18] Reserved.

Definition at line 233 of file Cpuid.h.

◆ Reserved3

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::Reserved3

[Bit 25:24] Reserved.

Definition at line 245 of file Cpuid.h.

◆ Reserved4

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::Reserved4

[Bit 31:30] Reserved.

Definition at line 265 of file Cpuid.h.

◆ SKINIT

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::SKINIT

[Bit 12] SKINIT and STGI support.

Definition at line 209 of file Cpuid.h.

◆ SSE4A

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::SSE4A

[Bit 6] SSE4A instruction support.

Definition at line 185 of file Cpuid.h.

◆ SVM

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::SVM

[Bit 2] Secure Virtual Mode feature.

Definition at line 169 of file Cpuid.h.

◆ TCE

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::TCE

[Bit 17] Translation Cache Extension.

Definition at line 229 of file Cpuid.h.

◆ TopologyExtensions

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::TopologyExtensions

[Bit 22] Topology Extensions support.

Definition at line 237 of file Cpuid.h.

◆ Uint32

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::Uint32

All bit fields as a 32-bit value

Definition at line 270 of file Cpuid.h.

◆ WDT

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::WDT

[Bit 13] Watchdog Timer support.

Definition at line 213 of file Cpuid.h.

◆ XOP

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_ECX::XOP

[Bit 11] Extended Operation Support.

Definition at line 205 of file Cpuid.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Amd/Cpuid.h

Data Fields