#include <MdePkg/Include/Register/Amd/Cpuid.h>

Data Fields
struct {
UINT32 FPU: 1

UINT32 VME: 1

UINT32 DE: 1

UINT32 PSE: 1

UINT32 TSC: 1

UINT32 MSR: 1

UINT32 PAE: 1

UINT32 MCE: 1

UINT32 CMPXCHG8B: 1

UINT32 APIC: 1

UINT32 Reserved1: 1

UINT32 SYSCALL_SYSRET: 1

UINT32 MTRR: 1

UINT32 PGE: 1

UINT32 MCA: 1

UINT32 CMOV: 1

UINT32 PAT: 1

UINT32 PSE36: 1

UINT32 Reserved2: 2

UINT32 NX: 1

UINT32 Reserved3: 1

UINT32 MmxExt: 1

UINT32 MMX: 1

UINT32 FFSR: 1

UINT32 FFXSR: 1

UINT32 Page1GB: 1

UINT32 RDTSCP: 1

UINT32 Reserved4: 1

UINT32 LM: 1

UINT32 ThreeDNow: 1

UINT32 ThreeDNowExt: 1

}	Bits

UINT32	Uint32

Detailed Description

CPUID Extended Processor Signature and Features EDX for CPUID leaf CPUID_EXTENDED_CPU_SIG.

Definition at line 277 of file Cpuid.h.

Field Documentation

◆ APIC

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::APIC

[Bit 9] APIC exists and is enabled.

Definition at line 321 of file Cpuid.h.

◆

struct { ... } CPUID_AMD_EXTENDED_CPU_SIG_EDX::Bits

Individual bit fields

◆ CMOV

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::CMOV

[Bit 15] Conditional move instructions, CMOV, FCOMI, FCMOV.

Definition at line 345 of file Cpuid.h.

◆ CMPXCHG8B

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::CMPXCHG8B

[Bit 8] CMPXCHG8B instruction.

Definition at line 317 of file Cpuid.h.

◆ DE

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::DE

[Bit 2] Debugging extensions, IO breakpoints, CR4.DE.

Definition at line 293 of file Cpuid.h.

◆ FFSR

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::FFSR

[Bit 24] FXSAVE and FXRSTOR instructions.

Definition at line 377 of file Cpuid.h.

◆ FFXSR

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::FFXSR

[Bit 25] FXSAVE and FXRSTOR instruction optimizations.

Definition at line 381 of file Cpuid.h.

◆ FPU

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::FPU

[Bit 0] x87 floating point unit on-chip.

Definition at line 285 of file Cpuid.h.

◆ LM

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::LM

[Bit 29] Long Mode.

Definition at line 397 of file Cpuid.h.

◆ MCA

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::MCA

[Bit 14] Machine check architecture, MCG_CAP.

Definition at line 341 of file Cpuid.h.

◆ MCE

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::MCE

[Bit 7] Machine check exception, CR4.MCE.

Definition at line 313 of file Cpuid.h.

◆ MMX

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::MMX

[Bit 23] MMX instructions.

Definition at line 373 of file Cpuid.h.

◆ MmxExt

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::MmxExt

[Bit 22] AMD Extensions to MMX instructions.

Definition at line 369 of file Cpuid.h.

◆ MSR

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::MSR

[Bit 5] MSRs, with RDMSR and WRMSR instructions.

Definition at line 305 of file Cpuid.h.

◆ MTRR

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::MTRR

[Bit 12] Memory-type range registers.

Definition at line 333 of file Cpuid.h.

◆ NX

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::NX

[Bit 20] No-execute page protection.

Definition at line 361 of file Cpuid.h.

◆ PAE

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::PAE

[Bit 6] Physical-address extensions (PAE).

Definition at line 309 of file Cpuid.h.

◆ Page1GB

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::Page1GB

[Bit 26] 1-GByte large page support.

Definition at line 385 of file Cpuid.h.

◆ PAT

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::PAT

[Bit 16] Page attribute table.

Definition at line 349 of file Cpuid.h.

◆ PGE

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::PGE

[Bit 13] Page global extension, CR4.PGE.

Definition at line 337 of file Cpuid.h.

◆ PSE

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::PSE

[Bit 3] Page-size extensions (4 MB pages).

Definition at line 297 of file Cpuid.h.

◆ PSE36

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::PSE36

[Bit 17] Page-size extensions.

Definition at line 353 of file Cpuid.h.

◆ RDTSCP

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::RDTSCP

[Bit 27] RDTSCP instructions.

Definition at line 389 of file Cpuid.h.

◆ Reserved1

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::Reserved1

[Bit 10] Reserved.

Definition at line 325 of file Cpuid.h.

◆ Reserved2

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::Reserved2

[Bit 19:18] Reserved.

Definition at line 357 of file Cpuid.h.

◆ Reserved3

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::Reserved3

[Bit 21] Reserved.

Definition at line 365 of file Cpuid.h.

◆ Reserved4

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::Reserved4

[Bit 28] Reserved.

Definition at line 393 of file Cpuid.h.

◆ SYSCALL_SYSRET

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::SYSCALL_SYSRET

[Bit 11] SYSCALL and SYSRET instructions.

Definition at line 329 of file Cpuid.h.

◆ ThreeDNow

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::ThreeDNow

[Bit 30] 3DNow! instructions.

Definition at line 401 of file Cpuid.h.

◆ ThreeDNowExt

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::ThreeDNowExt

[Bit 31] AMD Extensions to 3DNow! instructions.

Definition at line 405 of file Cpuid.h.

◆ TSC

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::TSC

[Bit 4] Time stamp counter, RDTSC/RDTSCP instructions, CR4.TSD.

Definition at line 301 of file Cpuid.h.

◆ Uint32

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::Uint32

All bit fields as a 32-bit value

Definition at line 410 of file Cpuid.h.

◆ VME

UINT32 CPUID_AMD_EXTENDED_CPU_SIG_EDX::VME

[Bit 1] Virtual-mode enhancements.

Definition at line 289 of file Cpuid.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Amd/Cpuid.h

Data Fields