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MSR_IA32_APIC_BASE_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields

struct {
   UINT32   Reserved1: 8
 
   UINT32   BSP: 1
 
   UINT32   Reserved2: 1
 
   UINT32   EXTD: 1
 
   UINT32   EN: 1
 
   UINT32   ApicBase: 20
 
   UINT32   ApicBaseHi: 32
 
Bits
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IA32_APIC_BASE

Definition at line 172 of file ArchitecturalMsr.h.

Field Documentation

◆ ApicBase

UINT32 MSR_IA32_APIC_BASE_REGISTER::ApicBase

[Bits 31:12] APIC Base (R/W).

Definition at line 195 of file ArchitecturalMsr.h.

◆ ApicBaseHi

UINT32 MSR_IA32_APIC_BASE_REGISTER::ApicBaseHi

[Bits 63:32] APIC Base (R/W).

Definition at line 199 of file ArchitecturalMsr.h.

◆ 

struct { ... } MSR_IA32_APIC_BASE_REGISTER::Bits

Individual bit fields

◆ BSP

UINT32 MSR_IA32_APIC_BASE_REGISTER::BSP

[Bit 8] BSP flag (R/W).

Definition at line 181 of file ArchitecturalMsr.h.

◆ EN

UINT32 MSR_IA32_APIC_BASE_REGISTER::EN

[Bit 11] APIC Global Enable (R/W).

Definition at line 191 of file ArchitecturalMsr.h.

◆ EXTD

UINT32 MSR_IA32_APIC_BASE_REGISTER::EXTD

[Bit 10] Enable x2APIC mode. Introduced at Display Family / Display Model 06_1AH.

Definition at line 187 of file ArchitecturalMsr.h.

◆ Reserved1

UINT32 MSR_IA32_APIC_BASE_REGISTER::Reserved1

Definition at line 177 of file ArchitecturalMsr.h.

◆ Reserved2

UINT32 MSR_IA32_APIC_BASE_REGISTER::Reserved2

Definition at line 182 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_APIC_BASE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 204 of file ArchitecturalMsr.h.


The documentation for this union was generated from the following file: