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MSR_IA32_BNDCFGS_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields

struct {
   UINT32   EN: 1
 
   UINT32   BNDPRESERVE: 1
 
   UINT32   Reserved: 10
 
   UINT32   Base: 20
 
   UINT32   BaseHi: 32
 
Bits
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IA32_BNDCFGS

Definition at line 6115 of file ArchitecturalMsr.h.

Field Documentation

◆ Base

UINT32 MSR_IA32_BNDCFGS_REGISTER::Base

[Bits 31:12] Base Address of Bound Directory.

Definition at line 6133 of file ArchitecturalMsr.h.

◆ BaseHi

UINT32 MSR_IA32_BNDCFGS_REGISTER::BaseHi

[Bits 63:32] Base Address of Bound Directory.

Definition at line 6137 of file ArchitecturalMsr.h.

◆ 

struct { ... } MSR_IA32_BNDCFGS_REGISTER::Bits

Individual bit fields

◆ BNDPRESERVE

UINT32 MSR_IA32_BNDCFGS_REGISTER::BNDPRESERVE

[Bit 1] BNDPRESERVE: Preserve the bounds registers for near branch instructions in the absence of the BND prefix.

Definition at line 6128 of file ArchitecturalMsr.h.

◆ EN

UINT32 MSR_IA32_BNDCFGS_REGISTER::EN

[Bit 0] EN: Enable Intel MPX in supervisor mode.

Definition at line 6123 of file ArchitecturalMsr.h.

◆ Reserved

UINT32 MSR_IA32_BNDCFGS_REGISTER::Reserved

Definition at line 6129 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_BNDCFGS_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 6142 of file ArchitecturalMsr.h.


The documentation for this union was generated from the following file: