#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields
struct {
UINT32 SCE: 1

UINT32 Reserved1: 7

UINT32 LME: 1

UINT32 Reserved2: 1

UINT32 LMA: 1

UINT32 NXE: 1

UINT32 Reserved3: 20

UINT32 Reserved4: 32

}	Bits

UINT32	Uint32

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_IA32_EFER

Definition at line 6328 of file ArchitecturalMsr.h.

Field Documentation

◆

struct { ... } MSR_IA32_EFER_REGISTER::Bits

Individual bit fields

◆ LMA

UINT32 MSR_IA32_EFER_REGISTER::LMA

[Bit 10] IA-32e Mode Active: IA32_EFER.LMA (R) Indicates IA-32e mode is active when set.

Definition at line 6349 of file ArchitecturalMsr.h.

◆ LME

UINT32 MSR_IA32_EFER_REGISTER::LME

[Bit 8] IA-32e Mode Enable: IA32_EFER.LME (R/W) Enables IA-32e mode operation.

Definition at line 6343 of file ArchitecturalMsr.h.

◆ NXE

UINT32 MSR_IA32_EFER_REGISTER::NXE

[Bit 11] Execute Disable Bit Enable: IA32_EFER.NXE (R/W).

Definition at line 6353 of file ArchitecturalMsr.h.

◆ Reserved1

UINT32 MSR_IA32_EFER_REGISTER::Reserved1

Definition at line 6338 of file ArchitecturalMsr.h.

◆ Reserved2

UINT32 MSR_IA32_EFER_REGISTER::Reserved2

Definition at line 6344 of file ArchitecturalMsr.h.

◆ Reserved3

UINT32 MSR_IA32_EFER_REGISTER::Reserved3

Definition at line 6354 of file ArchitecturalMsr.h.

◆ Reserved4

UINT32 MSR_IA32_EFER_REGISTER::Reserved4

Definition at line 6355 of file ArchitecturalMsr.h.

◆ SCE

UINT32 MSR_IA32_EFER_REGISTER::SCE

[Bit 0] SYSCALL Enable: IA32_EFER.SCE (R/W) Enables SYSCALL/SYSRET instructions in 64-bit mode.

Definition at line 6337 of file ArchitecturalMsr.h.

◆ Uint32

UINT32 MSR_IA32_EFER_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 6360 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_EFER_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 6364 of file ArchitecturalMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/ArchitecturalMsr.h

Data Fields