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TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>
Data Fields | |
| struct { | |
| UINT32 EN_Guaranteed_Performance_Change: 1 | |
| UINT32 EN_Excursion_Minimum: 1 | |
| UINT32 Reserved1: 30 | |
| UINT32 Reserved2: 32 | |
| } | Bits |
| UINT32 | Uint32 |
| UINT64 | Uint64 |
MSR information returned for MSR index MSR_IA32_HWP_INTERRUPT
Definition at line 5064 of file ArchitecturalMsr.h.
| struct { ... } MSR_IA32_HWP_INTERRUPT_REGISTER::Bits |
Individual bit fields
| UINT32 MSR_IA32_HWP_INTERRUPT_REGISTER::EN_Excursion_Minimum |
[Bit 1] EN_Excursion_Minimum. See Section 14.4.6, "HWP Notifications". If CPUID.06H:EAX.[8] = 1.
Definition at line 5078 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_HWP_INTERRUPT_REGISTER::EN_Guaranteed_Performance_Change |
[Bit 0] EN_Guaranteed_Performance_Change. See Section 14.4.6, "HWP Notifications". If CPUID.06H:EAX.[8] = 1.
Definition at line 5073 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_HWP_INTERRUPT_REGISTER::Reserved1 |
Definition at line 5079 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_HWP_INTERRUPT_REGISTER::Reserved2 |
Definition at line 5080 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_HWP_INTERRUPT_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 5085 of file ArchitecturalMsr.h.
| UINT64 MSR_IA32_HWP_INTERRUPT_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 5089 of file ArchitecturalMsr.h.