MSR_IA32_PEBS_ENABLE_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields
struct {
UINT32   Enable: 1
UINT32   Reserved1: 3
UINT32   Reserved2: 28
UINT32   Reserved3: 4
UINT32   Reserved4: 28
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_IA32_PEBS_ENABLE

Definition at line 3350 of file ArchitecturalMsr.h.

Field Documentation

struct { ... } MSR_IA32_PEBS_ENABLE_REGISTER::Bits

Individual bit fields

Enable

UINT32 MSR_IA32_PEBS_ENABLE_REGISTER::Enable

[Bit 0] Enable PEBS on IA32_PMC0. Introduced at Display Family / Display Model 06_0FH.

Definition at line 3359 of file ArchitecturalMsr.h.

Reserved1

UINT32 MSR_IA32_PEBS_ENABLE_REGISTER::Reserved1

[Bits 3:1] Reserved or Model specific.

Definition at line 3363 of file ArchitecturalMsr.h.

Reserved2

UINT32 MSR_IA32_PEBS_ENABLE_REGISTER::Reserved2

Definition at line 3364 of file ArchitecturalMsr.h.

Reserved3

UINT32 MSR_IA32_PEBS_ENABLE_REGISTER::Reserved3

[Bits 35:32] Reserved or Model specific.

Definition at line 3368 of file ArchitecturalMsr.h.

Reserved4

UINT32 MSR_IA32_PEBS_ENABLE_REGISTER::Reserved4

Definition at line 3369 of file ArchitecturalMsr.h.

Uint64

UINT64 MSR_IA32_PEBS_ENABLE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 3374 of file ArchitecturalMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/ArchitecturalMsr.h