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Data Fields
MSR_IA32_PERF_GLOBAL_CTRL_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields

struct {
   UINT32   EN_PMCn: 32
 
   UINT32   EN_FIXED_CTRn: 32
 
} Bits
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IA32_PERF_GLOBAL_CTRL

Definition at line 3028 of file ArchitecturalMsr.h.

Field Documentation

◆ 

struct { ... } MSR_IA32_PERF_GLOBAL_CTRL_REGISTER::Bits

Individual bit fields

◆ EN_FIXED_CTRn

UINT32 MSR_IA32_PERF_GLOBAL_CTRL_REGISTER::EN_FIXED_CTRn

[Bits 63:32] EN_FIXED_CTRn. If CPUID.0AH: EDX[4:0] > n. Enable bitmask. Only the first n-1 bits are valid. Bits 31:n are reserved.

Definition at line 3044 of file ArchitecturalMsr.h.

◆ EN_PMCn

UINT32 MSR_IA32_PERF_GLOBAL_CTRL_REGISTER::EN_PMCn

[Bits 31:0] EN_PMCn. If CPUID.0AH: EAX[15:8] > n. Enable bitmask. Only the first n-1 bits are valid. Bits n..31 are reserved.

Definition at line 3038 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_PERF_GLOBAL_CTRL_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 3049 of file ArchitecturalMsr.h.

The documentation for this union was generated from the following file: