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MSR_IA32_PKG_HDC_CTL_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields

struct {
   UINT32   HDC_Pkg_Enable: 1
 
   UINT32   Reserved1: 31
 
   UINT32   Reserved2: 32
 
Bits
 
UINT32 Uint32
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IA32_PKG_HDC_CTL

Definition at line 6214 of file ArchitecturalMsr.h.

Field Documentation

◆ 

struct { ... } MSR_IA32_PKG_HDC_CTL_REGISTER::Bits

Individual bit fields

◆ HDC_Pkg_Enable

UINT32 MSR_IA32_PKG_HDC_CTL_REGISTER::HDC_Pkg_Enable

[Bit 0] HDC_Pkg_Enable (R/W) Force HDC idling or wake up HDC-idled logical processors in the package. See Section 14.5.2, "Package level Enabling HDC". If CPUID.06H:EAX.[13] = 1.

Definition at line 6224 of file ArchitecturalMsr.h.

◆ Reserved1

UINT32 MSR_IA32_PKG_HDC_CTL_REGISTER::Reserved1

Definition at line 6225 of file ArchitecturalMsr.h.

◆ Reserved2

UINT32 MSR_IA32_PKG_HDC_CTL_REGISTER::Reserved2

Definition at line 6226 of file ArchitecturalMsr.h.

◆ Uint32

UINT32 MSR_IA32_PKG_HDC_CTL_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 6231 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_PKG_HDC_CTL_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 6235 of file ArchitecturalMsr.h.


The documentation for this union was generated from the following file: