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MSR_IA32_PQR_ASSOC_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>

Data Fields

struct {
   UINT32   ResourceMonitoringID: 32
 
   UINT32   COS: 32
 
Bits
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IA32_PQR_ASSOC

Definition at line 6067 of file ArchitecturalMsr.h.

Field Documentation

◆ 

struct { ... } MSR_IA32_PQR_ASSOC_REGISTER::Bits

Individual bit fields

◆ COS

UINT32 MSR_IA32_PQR_ASSOC_REGISTER::COS

[Bits 63:32] COS (R/W). The class of service (COS) to enforce (on writes); returns the current COS when read. If ( CPUID.(EAX=07H, ECX=0):EBX.[15] = 1 ).

Definition at line 6083 of file ArchitecturalMsr.h.

◆ ResourceMonitoringID

UINT32 MSR_IA32_PQR_ASSOC_REGISTER::ResourceMonitoringID

[Bits 31:0] Resource Monitoring ID (R/W): ID for monitoring hardware to track internal operation, e.g. memory access. N = Ceil (Log:sub:2 ( CPUID.(EAX= 0FH, ECX=0H).EBX[31:0] +1)).

Definition at line 6077 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_PQR_ASSOC_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 6088 of file ArchitecturalMsr.h.


The documentation for this union was generated from the following file: