|
TianoCore EDK2 master
|
#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>
Data Fields | |
| struct { | |
| UINT32 FilterEn: 1 | |
| UINT32 ContexEn: 1 | |
| UINT32 TriggerEn: 1 | |
| UINT32 Reserved1: 1 | |
| UINT32 Error: 1 | |
| UINT32 Stopped: 1 | |
| UINT32 Reserved2: 26 | |
| UINT32 PacketByteCnt: 17 | |
| UINT32 Reserved3: 15 | |
| } | Bits |
| UINT64 | Uint64 |
MSR information returned for MSR index MSR_IA32_RTIT_STATUS
Definition at line 4661 of file ArchitecturalMsr.h.
| struct { ... } MSR_IA32_RTIT_STATUS_REGISTER::Bits |
Individual bit fields
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::ContexEn |
[Bit 1] ContexEn, (writes ignored).
Definition at line 4674 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::Error |
[Bit 4] Error.
Definition at line 4683 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::FilterEn |
[Bit 0] FilterEn, (writes ignored). If (CPUID.(EAX=07H, ECX=0):EBX[2] = 1).
Definition at line 4670 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::PacketByteCnt |
[Bits 48:32] PacketByteCnt. If (CPUID.(EAX=07H, ECX=0):EBX[1] > 3).
Definition at line 4692 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::Reserved1 |
Definition at line 4679 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::Reserved2 |
Definition at line 4688 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::Reserved3 |
Definition at line 4693 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::Stopped |
[Bit 5] Stopped.
Definition at line 4687 of file ArchitecturalMsr.h.
| UINT32 MSR_IA32_RTIT_STATUS_REGISTER::TriggerEn |
[Bit 2] TriggerEn, (writes ignored).
Definition at line 4678 of file ArchitecturalMsr.h.
| UINT64 MSR_IA32_RTIT_STATUS_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 4698 of file ArchitecturalMsr.h.