TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/ArchitecturalMsr.h>
Data Fields | |
struct { | |
UINT32 Lock: 1 | |
UINT32 TmeEnable: 1 | |
UINT32 KeySelect: 1 | |
UINT32 SaveKeyForStandby: 1 | |
UINT32 TmePolicy: 4 | |
UINT32 Reserved: 23 | |
UINT32 TmeBypassMode: 1 | |
UINT32 MkTmeKeyidBits: 4 | |
UINT32 Reserved2: 12 | |
UINT32 MkTmeCryptoAlgs: 16 | |
} | Bits |
UINT32 | Uint32 [2] |
UINT64 | Uint64 |
MSR information returned for MSR index MSR_IA32_TME_ACTIVATE
Definition at line 5712 of file ArchitecturalMsr.h.
struct { ... } MSR_IA32_TME_ACTIVATE_REGISTER::Bits |
Individual bit fields
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::KeySelect |
[Bit 2] Key Select: 0: Create a new TME key (expected cold/warm boot). 1: Restore the TME key from storage (Expected when resume from standby).
Definition at line 5732 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::Lock |
[Bit 0] Lock R/O: Will be set upon successful WRMSR (or first SMI); written value ignored..
Definition at line 5721 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::MkTmeCryptoAlgs |
[Bit 63:48] MK_TME_CRYPTO_ALGS: Reserved if MKTME is not enumerated, otherwise: Bit 48: AES-XTS 128. Bit 49: AES-XTS 128 with integrity. Bit 50: AES-XTS 256. Bit 63:51: Reserved (#GP) Bitmask for BIOS to set which encryption algorithms are allowed for MKTME, would be later enforced by the key loading ISA ('1= allowed)
Definition at line 5781 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::MkTmeKeyidBits |
[Bit 35:32] MK_TME_KEYID_BITS: Reserved if MKTME is not enumerated, otherwise: The number of key identifier bits to allocate to MKTME usage. Similar to enumeration, this is an encoded value. Writing a value greater than MK_TME_MAX_KEYID_BITS will result in #GP. Writing a non-zero value to this field will #GP if bit 1 of EAX (Hardware Encryption Enable) is not also set to 1, as encryption hardware must be enabled to use MKTME. Example: To support 255 keys, this field would be set to a value of 8.
Definition at line 5770 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::Reserved |
Definition at line 5749 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::Reserved2 |
Definition at line 5771 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::SaveKeyForStandby |
[Bit 3] Save TME Key for Standby: Save key into storage to be used when resume from standby. Note: This may not be supported in all processors.
Definition at line 5738 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::TmeBypassMode |
[Bit 31] TME Encryption Bypass Enable: When encryption hardware is enabled:
Definition at line 5759 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::TmeEnable |
[Bit 1] Hardware Encryption Enable: This bit also enables MKTME; MKTME cannot be enabled without enabling encryption hardware.
Definition at line 5726 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::TmePolicy |
[Bit 7:4] TME Policy/Encryption Algorithm: Only algorithms enumerated in IA32_TME_CAPABILITY are allowed. For example: 0000 - AES-XTS-128. 0001 - AES-XTS-128 with integrity. 0010 - AES-XTS-256. Other values are invalid.
Definition at line 5748 of file ArchitecturalMsr.h.
UINT32 MSR_IA32_TME_ACTIVATE_REGISTER::Uint32[2] |
All bit fields as a 32-bit value
Definition at line 5786 of file ArchitecturalMsr.h.
UINT64 MSR_IA32_TME_ACTIVATE_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 5790 of file ArchitecturalMsr.h.