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TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/Msr/IvyBridgeMsr.h>
Data Fields | |
| struct { | |
| UINT32 TDP_LEVEL: 2 | |
| UINT32 Reserved1: 29 | |
| UINT32 Config_TDP_Lock: 1 | |
| UINT32 Reserved2: 32 | |
| } | Bits |
| UINT32 | Uint32 |
| UINT64 | Uint64 |
MSR information returned for MSR index MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL
Definition at line 412 of file IvyBridgeMsr.h.
| struct { ... } MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::Bits |
Individual bit fields
| UINT32 MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::Config_TDP_Lock |
[Bit 31] Config_TDP_Lock (RW/L) When this bit is set, the content of this register is locked until a reset.
Definition at line 426 of file IvyBridgeMsr.h.
| UINT32 MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::Reserved1 |
Definition at line 421 of file IvyBridgeMsr.h.
| UINT32 MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::Reserved2 |
Definition at line 427 of file IvyBridgeMsr.h.
| UINT32 MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::TDP_LEVEL |
[Bits 1:0] TDP_LEVEL (RW/L) System BIOS can program this field.
Definition at line 420 of file IvyBridgeMsr.h.
| UINT32 MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 432 of file IvyBridgeMsr.h.
| UINT64 MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 436 of file IvyBridgeMsr.h.