TianoCore EDK2 master
Loading...
Searching...
No Matches
MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/IvyBridgeMsr.h>

Data Fields

struct {
   UINT32   Reserved1: 1
 
   UINT32   MemErrorLogEnable: 1
 
   UINT32   Reserved2: 30
 
   UINT32   Reserved3: 32
 
Bits
 
UINT32 Uint32
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IVY_BRIDGE_ERROR_CONTROL

Definition at line 675 of file IvyBridgeMsr.h.

Field Documentation

◆ 

struct { ... } MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::Bits

Individual bit fields

◆ MemErrorLogEnable

UINT32 MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::MemErrorLogEnable

[Bit 1] MemError Log Enable (R/W) When set, enables IMC status bank to log additional info in bits 36:32.

Definition at line 685 of file IvyBridgeMsr.h.

◆ Reserved1

UINT32 MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::Reserved1

Definition at line 680 of file IvyBridgeMsr.h.

◆ Reserved2

UINT32 MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::Reserved2

Definition at line 686 of file IvyBridgeMsr.h.

◆ Reserved3

UINT32 MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::Reserved3

Definition at line 687 of file IvyBridgeMsr.h.

◆ Uint32

UINT32 MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 692 of file IvyBridgeMsr.h.

◆ Uint64

UINT64 MSR_IVY_BRIDGE_ERROR_CONTROL_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 696 of file IvyBridgeMsr.h.


The documentation for this union was generated from the following file: