#include <MdePkg/Include/Register/Intel/Msr/IvyBridgeMsr.h>

Data Fields
struct {
UINT32 PEBS_EN_PMC0: 1

UINT32 PEBS_EN_PMC1: 1

UINT32 PEBS_EN_PMC2: 1

UINT32 PEBS_EN_PMC3: 1

UINT32 Reserved1: 28

UINT32 LL_EN_PMC0: 1

UINT32 LL_EN_PMC1: 1

UINT32 LL_EN_PMC2: 1

UINT32 LL_EN_PMC3: 1

UINT32 Reserved2: 28

}	Bits

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_IVY_BRIDGE_PEBS_ENABLE

Definition at line 1107 of file IvyBridgeMsr.h.

Field Documentation

◆

struct { ... } MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Bits

Individual bit fields

◆ LL_EN_PMC0

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC0

[Bit 32] Enable Load Latency on IA32_PMC0. (R/W).

Definition at line 1132 of file IvyBridgeMsr.h.

◆ LL_EN_PMC1

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC1

[Bit 33] Enable Load Latency on IA32_PMC1. (R/W).

Definition at line 1136 of file IvyBridgeMsr.h.

◆ LL_EN_PMC2

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC2

[Bit 34] Enable Load Latency on IA32_PMC2. (R/W).

Definition at line 1140 of file IvyBridgeMsr.h.

◆ LL_EN_PMC3

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC3

[Bit 35] Enable Load Latency on IA32_PMC3. (R/W).

Definition at line 1144 of file IvyBridgeMsr.h.

◆ PEBS_EN_PMC0

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC0

[Bit 0] Enable PEBS on IA32_PMC0. (R/W).

Definition at line 1115 of file IvyBridgeMsr.h.

◆ PEBS_EN_PMC1

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC1

[Bit 1] Enable PEBS on IA32_PMC1. (R/W).

Definition at line 1119 of file IvyBridgeMsr.h.

◆ PEBS_EN_PMC2

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC2

[Bit 2] Enable PEBS on IA32_PMC2. (R/W).

Definition at line 1123 of file IvyBridgeMsr.h.

◆ PEBS_EN_PMC3

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC3

[Bit 3] Enable PEBS on IA32_PMC3. (R/W).

Definition at line 1127 of file IvyBridgeMsr.h.

◆ Reserved1

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Reserved1

Definition at line 1128 of file IvyBridgeMsr.h.

◆ Reserved2

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Reserved2

Definition at line 1145 of file IvyBridgeMsr.h.

◆ Uint64

UINT64 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 1150 of file IvyBridgeMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/Msr/IvyBridgeMsr.h

Data Fields