TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/Msr/Pentium4Msr.h>
Data Fields | |
struct { | |
UINT32 Reserved1: 21 | |
UINT32 ScalableBusSpeed: 3 | |
UINT32 Reserved2: 8 | |
UINT32 Reserved3: 32 | |
} | Bits |
UINT32 | Uint32 |
UINT64 | Uint64 |
MSR information returned for MSR index MSR_PENTIUM_4_EBC_FREQUENCY_ID_1
Definition at line 331 of file Pentium4Msr.h.
struct { ... } MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::Bits |
Individual bit fields
UINT32 MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::Reserved1 |
Definition at line 336 of file Pentium4Msr.h.
UINT32 MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::Reserved2 |
Definition at line 344 of file Pentium4Msr.h.
UINT32 MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::Reserved3 |
Definition at line 345 of file Pentium4Msr.h.
UINT32 MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::ScalableBusSpeed |
[Bits 23:21] Scalable Bus Speed (R/W) Indicates the intended scalable bus speed: Encoding Scalable Bus Speed
000B 100 MHz All others values reserved.
Definition at line 343 of file Pentium4Msr.h.
UINT32 MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 350 of file Pentium4Msr.h.
UINT64 MSR_PENTIUM_4_EBC_FREQUENCY_ID_1_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 354 of file Pentium4Msr.h.