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MSR_PENTIUM_4_PEBS_ENABLE_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/Pentium4Msr.h>

Data Fields

struct {
   UINT32   EventNum: 13
 
   UINT32   Reserved1: 11
 
   UINT32   UOP: 1
 
   UINT32   ENABLE_PEBS_MY_THR: 1
 
   UINT32   ENABLE_PEBS_OTH_THR: 1
 
   UINT32   Reserved2: 5
 
   UINT32   Reserved3: 32
 
Bits
 
UINT32 Uint32
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_PENTIUM_4_PEBS_ENABLE

Definition at line 2146 of file Pentium4Msr.h.

Field Documentation

◆ 

struct { ... } MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::Bits

Individual bit fields

◆ ENABLE_PEBS_MY_THR

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::ENABLE_PEBS_MY_THR

[Bit 25] ENABLE_PEBS_MY_THR (R/W) Enables PEBS for the target logical processor when set; disables PEBS when clear (default). See Section 18.6.4.3, "IA32_PEBS_ENABLE MSR," for an explanation of the target logical processor. This bit is called ENABLE_PEBS in IA-32 processors that do not support Intel HyperThreading Technology.

Definition at line 2167 of file Pentium4Msr.h.

◆ ENABLE_PEBS_OTH_THR

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::ENABLE_PEBS_OTH_THR

[Bit 26] ENABLE_PEBS_OTH_THR (R/W) Enables PEBS for the target logical processor when set; disables PEBS when clear (default). See Section 18.6.4.3, "IA32_PEBS_ENABLE MSR," for an explanation of the target logical processor. This bit is reserved for IA-32 processors that do not support Intel Hyper-Threading Technology.

Definition at line 2175 of file Pentium4Msr.h.

◆ EventNum

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::EventNum

[Bits 12:0] See Table 19-36.

Definition at line 2154 of file Pentium4Msr.h.

◆ Reserved1

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::Reserved1

Definition at line 2155 of file Pentium4Msr.h.

◆ Reserved2

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::Reserved2

Definition at line 2176 of file Pentium4Msr.h.

◆ Reserved3

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::Reserved3

Definition at line 2177 of file Pentium4Msr.h.

◆ Uint32

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 2182 of file Pentium4Msr.h.

◆ Uint64

UINT64 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 2186 of file Pentium4Msr.h.

◆ UOP

UINT32 MSR_PENTIUM_4_PEBS_ENABLE_REGISTER::UOP

[Bit 24] UOP Tag Enables replay tagging when set.

Definition at line 2159 of file Pentium4Msr.h.


The documentation for this union was generated from the following file: