TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/Msr/PentiumMMsr.h>
Data Fields | |
struct { | |
UINT32 Reserved1: 16 | |
UINT32 TM_SELECT: 1 | |
UINT32 Reserved2: 15 | |
UINT32 Reserved3: 32 | |
} | Bits |
UINT32 | Uint32 |
UINT64 | Uint64 |
MSR information returned for MSR index MSR_PENTIUM_M_THERM2_CTL
Definition at line 335 of file PentiumMMsr.h.
struct { ... } MSR_PENTIUM_M_THERM2_CTL_REGISTER::Bits |
Individual bit fields
UINT32 MSR_PENTIUM_M_THERM2_CTL_REGISTER::Reserved1 |
Definition at line 340 of file PentiumMMsr.h.
UINT32 MSR_PENTIUM_M_THERM2_CTL_REGISTER::Reserved2 |
Definition at line 349 of file PentiumMMsr.h.
UINT32 MSR_PENTIUM_M_THERM2_CTL_REGISTER::Reserved3 |
Definition at line 350 of file PentiumMMsr.h.
UINT32 MSR_PENTIUM_M_THERM2_CTL_REGISTER::TM_SELECT |
[Bit 16] TM_SELECT (R/W) Mode of automatic thermal monitor: 1. = Thermal Monitor 1 (thermally-initiated on-die modulation of the stop-clock duty cycle) 2. = Thermal Monitor 2 (thermally-initiated frequency transitions) If bit 3 of the IA32_MISC_ENABLE register is cleared, TM_SELECT has no effect. Neither TM1 nor TM2 will be enabled.
Definition at line 348 of file PentiumMMsr.h.
UINT32 MSR_PENTIUM_M_THERM2_CTL_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 355 of file PentiumMMsr.h.
UINT64 MSR_PENTIUM_M_THERM2_CTL_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 359 of file PentiumMMsr.h.