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TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h>
Data Fields | |
| struct { | |
| UINT32 AESConfiguration: 2 | |
| UINT32 Reserved1: 30 | |
| UINT32 Reserved2: 32 | |
| } | Bits |
| UINT32 | Uint32 |
| UINT64 | Uint64 |
MSR information returned for MSR index MSR_SANDY_BRIDGE_FEATURE_CONFIG
Definition at line 323 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER::AESConfiguration |
[Bits 1:0] AES Configuration (RW-L) Upon a successful read of this MSR, the configuration of AES instruction set availability is as follows: 11b: AES instructions are not available until next RESET. otherwise, AES instructions are available. Note, AES instruction set is not available if read is unsuccessful. If the configuration is not 01b, AES instruction can be mis-configured if a privileged agent unintentionally writes 11b.
Definition at line 337 of file SandyBridgeMsr.h.
| struct { ... } MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER::Bits |
Individual bit fields
| UINT32 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER::Reserved1 |
Definition at line 338 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER::Reserved2 |
Definition at line 339 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 344 of file SandyBridgeMsr.h.
| UINT64 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 348 of file SandyBridgeMsr.h.