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MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h>

Data Fields

struct {
   UINT32   PCUHardwareError: 1
 
   UINT32   PCUControllerError: 1
 
   UINT32   PCUFirmwareError: 1
 
   UINT32   Reserved1: 29
 
   UINT32   Reserved2: 32
 
Bits
 
UINT32 Uint32
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_SANDY_BRIDGE_IA32_MC4_CTL

Definition at line 1450 of file SandyBridgeMsr.h.

Field Documentation

◆ 

struct { ... } MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::Bits

Individual bit fields

◆ PCUControllerError

UINT32 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::PCUControllerError

[Bit 1] PCU Controller Error (R/W) When set, enables signaling of PCU controller detected errors.

Definition at line 1464 of file SandyBridgeMsr.h.

◆ PCUFirmwareError

UINT32 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::PCUFirmwareError

[Bit 2] PCU Firmware Error (R/W) When set, enables signaling of PCU firmware detected errors.

Definition at line 1469 of file SandyBridgeMsr.h.

◆ PCUHardwareError

UINT32 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::PCUHardwareError

[Bit 0] PCU Hardware Error (R/W) When set, enables signaling of PCU hardware detected errors.

Definition at line 1459 of file SandyBridgeMsr.h.

◆ Reserved1

UINT32 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::Reserved1

Definition at line 1470 of file SandyBridgeMsr.h.

◆ Reserved2

UINT32 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::Reserved2

Definition at line 1471 of file SandyBridgeMsr.h.

◆ Uint32

UINT32 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 1476 of file SandyBridgeMsr.h.

◆ Uint64

UINT64 MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 1480 of file SandyBridgeMsr.h.


The documentation for this union was generated from the following file: