#include <MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h>

Data Fields
struct {
UINT32 Ovf_PMC0: 1

UINT32 Ovf_PMC1: 1

UINT32 Ovf_PMC2: 1

UINT32 Ovf_PMC3: 1

UINT32 Ovf_PMC4: 1

UINT32 Ovf_PMC5: 1

UINT32 Ovf_PMC6: 1

UINT32 Ovf_PMC7: 1

UINT32 Reserved1: 24

UINT32 Ovf_FixedCtr0: 1

UINT32 Ovf_FixedCtr1: 1

UINT32 Ovf_FixedCtr2: 1

UINT32 Reserved2: 26

UINT32 Ovf_Uncore: 1

UINT32 Ovf_BufDSSAVE: 1

UINT32 CondChgd: 1

}	Bits

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS

Definition at line 930 of file SandyBridgeMsr.h.

Field Documentation

◆

struct { ... } MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Bits

Individual bit fields

◆ CondChgd

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::CondChgd

[Bit 63] Thread. CondChgd.

Definition at line 992 of file SandyBridgeMsr.h.

◆ Ovf_BufDSSAVE

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_BufDSSAVE

[Bit 62] Thread. Ovf_BufDSSAVE.

Definition at line 988 of file SandyBridgeMsr.h.

◆ Ovf_FixedCtr0

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_FixedCtr0

[Bit 32] Thread. Ovf_FixedCtr0.

Definition at line 971 of file SandyBridgeMsr.h.

◆ Ovf_FixedCtr1

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_FixedCtr1

[Bit 33] Thread. Ovf_FixedCtr1.

Definition at line 975 of file SandyBridgeMsr.h.

◆ Ovf_FixedCtr2

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_FixedCtr2

[Bit 34] Thread. Ovf_FixedCtr2.

Definition at line 979 of file SandyBridgeMsr.h.

◆ Ovf_PMC0

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC0

[Bit 0] Thread. Ovf_PMC0.

Definition at line 938 of file SandyBridgeMsr.h.

◆ Ovf_PMC1

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC1

[Bit 1] Thread. Ovf_PMC1.

Definition at line 942 of file SandyBridgeMsr.h.

◆ Ovf_PMC2

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC2

[Bit 2] Thread. Ovf_PMC2.

Definition at line 946 of file SandyBridgeMsr.h.

◆ Ovf_PMC3

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC3

[Bit 3] Thread. Ovf_PMC3.

Definition at line 950 of file SandyBridgeMsr.h.

◆ Ovf_PMC4

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC4

[Bit 4] Core. Ovf_PMC4 (if CPUID.0AH:EAX[15:8] > 4).

Definition at line 954 of file SandyBridgeMsr.h.

◆ Ovf_PMC5

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC5

[Bit 5] Core. Ovf_PMC5 (if CPUID.0AH:EAX[15:8] > 5).

Definition at line 958 of file SandyBridgeMsr.h.

◆ Ovf_PMC6

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC6

[Bit 6] Core. Ovf_PMC6 (if CPUID.0AH:EAX[15:8] > 6).

Definition at line 962 of file SandyBridgeMsr.h.

◆ Ovf_PMC7

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_PMC7

[Bit 7] Core. Ovf_PMC7 (if CPUID.0AH:EAX[15:8] > 7).

Definition at line 966 of file SandyBridgeMsr.h.

◆ Ovf_Uncore

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Ovf_Uncore

[Bit 61] Thread. Ovf_Uncore.

Definition at line 984 of file SandyBridgeMsr.h.

◆ Reserved1

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Reserved1

Definition at line 967 of file SandyBridgeMsr.h.

◆ Reserved2

UINT32 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Reserved2

Definition at line 980 of file SandyBridgeMsr.h.

◆ Uint64

UINT64 MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 997 of file SandyBridgeMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h

Data Fields