MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h>

Data Fields
struct {
UINT32   MinimumThreshold: 16
UINT32   Reserved1: 16
UINT32   Reserved2: 32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SANDY_BRIDGE_PEBS_LD_LAT

Definition at line 1278 of file SandyBridgeMsr.h.

Field Documentation

struct { ... } MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER::Bits

Individual bit fields

MinimumThreshold

UINT32 MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER::MinimumThreshold

[Bits 15:0] Minimum threshold latency value of tagged load operation that will be counted. (R/W).

Definition at line 1287 of file SandyBridgeMsr.h.

Reserved1

UINT32 MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER::Reserved1

Definition at line 1288 of file SandyBridgeMsr.h.

Reserved2

UINT32 MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER::Reserved2

Definition at line 1289 of file SandyBridgeMsr.h.

Uint32

UINT32 MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 1294 of file SandyBridgeMsr.h.

Uint64

UINT64 MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 1298 of file SandyBridgeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h