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TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h>
Data Fields | |
| struct { | |
| UINT32 TimeLimit: 10 | |
| UINT32 TimeUnit: 3 | |
| UINT32 Reserved1: 2 | |
| UINT32 Valid: 1 | |
| UINT32 Reserved2: 16 | |
| UINT32 Reserved3: 32 | |
| } | Bits |
| UINT32 | Uint32 |
| UINT64 | Uint64 |
MSR information returned for MSR index MSR_SANDY_BRIDGE_PKGC6_IRTL
Definition at line 1608 of file SandyBridgeMsr.h.
| struct { ... } MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Bits |
Individual bit fields
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Reserved1 |
Definition at line 1626 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Reserved2 |
Definition at line 1632 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Reserved3 |
Definition at line 1633 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::TimeLimit |
[Bits 9:0] Interrupt response time limit (R/W) Specifies the limit that should be used to decide if the package should be put into a package C6 state.
Definition at line 1618 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::TimeUnit |
[Bits 12:10] Time Unit (R/W) Specifies the encoding value of time unit of the interrupt response time limit. The following time unit encodings are supported: 000b: 1 ns 001b: 32 ns 010b: 1024 ns 011b: 32768 ns 100b: 1048576 ns 101b: 33554432 ns.
Definition at line 1625 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 1638 of file SandyBridgeMsr.h.
| UINT64 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 1642 of file SandyBridgeMsr.h.
| UINT32 MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER::Valid |
[Bit 15] Valid (R/W) Indicates whether the values in bits 12:0 are valid and can be used by the processor for package C-sate management.
Definition at line 1631 of file SandyBridgeMsr.h.