#include <MdePkg/Include/Register/Intel/Msr/SilvermontMsr.h>

Data Fields
struct {
UINT32 Limit: 3

UINT32 Reserved1: 7

UINT32 IO_MWAIT: 1

UINT32 Reserved2: 4

UINT32 CFGLock: 1

UINT32 Reserved3: 16

UINT32 Reserved4: 32

}	Bits

UINT32	Uint32

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL

Definition at line 438 of file SilvermontMsr.h.

Field Documentation

◆

struct { ... } MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Bits

Individual bit fields

◆ CFGLock

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::CFGLock

[Bit 15] CFG Lock (R/WO) When set, lock bits 15:0 of this register until next reset.

Definition at line 464 of file SilvermontMsr.h.

◆ IO_MWAIT

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::IO_MWAIT

[Bit 10] I/O MWAIT Redirection Enable (R/W) When set, will map IO_read instructions sent to IO register specified by MSR_PMG_IO_CAPTURE_BASE to MWAIT instructions.

Definition at line 458 of file SilvermontMsr.h.

◆ Limit

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Limit

[Bits 2:0] Package C-State Limit (R/W) Specifies the lowest processor-specific C-state code name (consuming the least power). for the package. The default is set as factory-configured package C-state limit. The following C-state code name encodings are supported: 000b: C0 (no package C-sate support) 001b: C1 (Behavior is the same as 000b) 100b: C4 110b: C6 111b: C7 (Silvermont only).

Definition at line 451 of file SilvermontMsr.h.

◆ Reserved1

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved1

Definition at line 452 of file SilvermontMsr.h.

◆ Reserved2

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved2

Definition at line 459 of file SilvermontMsr.h.

◆ Reserved3

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved3

Definition at line 465 of file SilvermontMsr.h.

◆ Reserved4

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved4

Definition at line 466 of file SilvermontMsr.h.

◆ Uint32

UINT32 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 471 of file SilvermontMsr.h.

◆ Uint64

UINT64 MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 475 of file SilvermontMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/Msr/SilvermontMsr.h

Data Fields