#include <MdePkg/Include/Register/Intel/Msr/SilvermontMsr.h>

Data Fields
struct {
UINT32 Reserved1: 16

UINT32 TemperatureTarget: 8

UINT32 TargetOffset: 6

UINT32 Reserved2: 2

UINT32 Reserved3: 32

}	Bits

UINT32	Uint32

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SILVERMONT_TEMPERATURE_TARGET

Definition at line 771 of file SilvermontMsr.h.

Field Documentation

◆

struct { ... } MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::Bits

Individual bit fields

◆ Reserved1

UINT32 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::Reserved1

Definition at line 776 of file SilvermontMsr.h.

◆ Reserved2

UINT32 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::Reserved2

Definition at line 790 of file SilvermontMsr.h.

◆ Reserved3

UINT32 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::Reserved3

Definition at line 791 of file SilvermontMsr.h.

◆ TargetOffset

UINT32 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::TargetOffset

[Bits 29:24] Target Offset (R/W) Specifies an offset in degrees C to adjust the throttling and PROCHOT# activation temperature from the default target specified in TEMPERATURE_TARGET (bits 23:16).

Definition at line 789 of file SilvermontMsr.h.

◆ TemperatureTarget

UINT32 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::TemperatureTarget

[Bits 23:16] Temperature Target (R) The default thermal throttling or PROCHOT# activation temperature in degree C, The effective temperature for thermal throttling or PROCHOT# activation is "Temperature Target"

"Target Offset".

Definition at line 783 of file SilvermontMsr.h.

◆ Uint32

UINT32 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 796 of file SilvermontMsr.h.

◆ Uint64

UINT64 MSR_SILVERMONT_TEMPERATURE_TARGET_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 800 of file SilvermontMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/Msr/SilvermontMsr.h

Data Fields