#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32 BranchMonitoringEventSignaled: 1

UINT32 LBRsValid: 1

UINT32 Reserved1: 6

UINT32 CntrHit0: 1

UINT32 CntrHit1: 1

UINT32 Reserved2: 6

UINT32 CountWindow: 10

UINT32 Reserved3: 6

UINT32 Count0: 8

UINT32 Count1: 8

UINT32 Reserved4: 16

}	Bits

UINT32	Uint32

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_BR_DETECT_STATUS

Definition at line 2757 of file SkylakeMsr.h.

Field Documentation

◆

struct { ... } MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Bits

Individual bit fields

◆ BranchMonitoringEventSignaled

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::BranchMonitoringEventSignaled

[Bit 0] Branch Monitoring Event Signaled When set to '1', Branch Monitoring event signaling is blocked until this bit is cleared by software.

Definition at line 2767 of file SkylakeMsr.h.

◆ CntrHit0

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::CntrHit0

[Bit 8] CntrHit0 Branch monitoring counter #0 threshold hit. This status bit is sticky and once set requires clearing by software. Counter operation continues independent of the state of the bit.

Definition at line 2779 of file SkylakeMsr.h.

◆ CntrHit1

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::CntrHit1

[Bit 9] CntrHit1 Branch monitoring counter #1 threshold hit. This status bit is sticky and once set requires clearing by software. Counter operation continues independent of the state of the bit.

Definition at line 2785 of file SkylakeMsr.h.

◆ Count0

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Count0

[Bits 39:32] Count0 The current value of counter 0 updated after each occurrence of the event being counted. The count value is frozen on a valid branch monitoring triggering condition (in which case CntrHit0 will also be set). This is an 8-bit signed value (2's complement). Heuristic events which only increment will saturate and freeze at maximum value 0xFF (256). RET-CALL event counter saturate at maximum value 0x7F (+127) and minimum value 0x80 (-128).

Definition at line 2803 of file SkylakeMsr.h.

◆ Count1

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Count1

[Bits 47:40] Count1 The current value of counter 1 updated after each occurrence of the event being counted. The count value is frozen on a valid branch monitoring triggering condition (in which case CntrHit1 will also be set). This is an 8-bit signed value (2's complement). Heuristic events which only increment will saturate and freeze at maximum value 0xFF (256). RET-CALL event counter saturate at maximum value 0x7F (+127) and minimum value 0x80 (-128).

Definition at line 2813 of file SkylakeMsr.h.

◆ CountWindow

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::CountWindow

[Bits 25:16] CountWindow The current value of the window counter. The count value is frozen on a valid branch monitoring triggering condition. This is a 10-bit unsigned value.

Definition at line 2792 of file SkylakeMsr.h.

◆ LBRsValid

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::LBRsValid

[Bit 1] LBRsValid This status bit is set to '1' if the LBR state is considered valid for sampling by branch monitoring software.

Definition at line 2772 of file SkylakeMsr.h.

◆ Reserved1

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Reserved1

Definition at line 2773 of file SkylakeMsr.h.

◆ Reserved2

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Reserved2

Definition at line 2786 of file SkylakeMsr.h.

◆ Reserved3

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Reserved3

Definition at line 2793 of file SkylakeMsr.h.

◆ Reserved4

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Reserved4

Definition at line 2814 of file SkylakeMsr.h.

◆ Uint32

UINT32 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 2819 of file SkylakeMsr.h.

◆ Uint64

UINT64 MSR_SKYLAKE_BR_DETECT_STATUS_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 2823 of file SkylakeMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h

Data Fields