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TianoCore EDK2 master
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#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>
Data Fields | |
| struct { | |
| UINT32 Energy: 32 | |
| UINT32 Reserved: 32 | |
| } | Bits |
| UINT32 | Uint32 |
| UINT64 | Uint64 |
MSR information returned for MSR index MSR_SKYLAKE_DRAM_ENERGY_STATUS
Definition at line 3456 of file SkylakeMsr.h.
| struct { ... } MSR_SKYLAKE_DRAM_ENERGY_STATUS_REGISTER::Bits |
Individual bit fields
| UINT32 MSR_SKYLAKE_DRAM_ENERGY_STATUS_REGISTER::Energy |
[Bits 31:0] Energy in 15.3 micro-joules. Requires BIOS configuration to enable DRAM RAPL mode 0 (Direct VR).
Definition at line 3465 of file SkylakeMsr.h.
| UINT32 MSR_SKYLAKE_DRAM_ENERGY_STATUS_REGISTER::Reserved |
Definition at line 3466 of file SkylakeMsr.h.
| UINT32 MSR_SKYLAKE_DRAM_ENERGY_STATUS_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 3471 of file SkylakeMsr.h.
| UINT64 MSR_SKYLAKE_DRAM_ENERGY_STATUS_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 3475 of file SkylakeMsr.h.