MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32   RMID: 10
UINT32   Reserved1: 22
UINT32   COS: 20
UINT32   Reserved2: 12
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_IA32_PQR_ASSOC

Definition at line 3651 of file SkylakeMsr.h.

Field Documentation

struct { ... } MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER::Bits

Individual bit fields

COS

UINT32 MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER::COS

[Bits 51:32] COS (R/W).

Definition at line 3664 of file SkylakeMsr.h.

Reserved1

UINT32 MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER::Reserved1

Definition at line 3660 of file SkylakeMsr.h.

Reserved2

UINT32 MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER::Reserved2

Definition at line 3665 of file SkylakeMsr.h.

RMID

UINT32 MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER::RMID

[Bits 9:0] RMID.

Definition at line 3659 of file SkylakeMsr.h.

Uint64

UINT64 MSR_SKYLAKE_IA32_PQR_ASSOC_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 3670 of file SkylakeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h