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MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields

struct {
   UINT32   C_StateLimit: 3
 
   UINT32   Reserved1: 7
 
   UINT32   MWAITRedirectionEnable: 1
 
   UINT32   Reserved2: 4
 
   UINT32   CFGLock: 1
 
   UINT32   AutomaticC_StateConversionEnable: 1
 
   UINT32   Reserved3: 8
 
   UINT32   C3StateAutoDemotionEnable: 1
 
   UINT32   C1StateAutoDemotionEnable: 1
 
   UINT32   EnableC3Undemotion: 1
 
   UINT32   EnableC1Undemotion: 1
 
   UINT32   CStateDemotionEnable: 1
 
   UINT32   CStateUnDemotionEnable: 1
 
   UINT32   Reserved4: 1
 
   UINT32   Reserved5: 32
 
Bits
 
UINT32 Uint32
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL

Definition at line 3039 of file SkylakeMsr.h.

Field Documentation

◆ AutomaticC_StateConversionEnable

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::AutomaticC_StateConversionEnable

[Bit 16] Automatic C-State Conversion Enable (R/W) If 1, the processor will convert HALT or MWAT(C1) to MWAIT(C6).

Definition at line 3068 of file SkylakeMsr.h.

◆ 

struct { ... } MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Bits

Individual bit fields

◆ C1StateAutoDemotionEnable

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::C1StateAutoDemotionEnable

[Bit 26] C1 State Auto Demotion Enable (R/W).

Definition at line 3077 of file SkylakeMsr.h.

◆ C3StateAutoDemotionEnable

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::C3StateAutoDemotionEnable

[Bit 25] C3 State Auto Demotion Enable (R/W).

Definition at line 3073 of file SkylakeMsr.h.

◆ C_StateLimit

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::C_StateLimit

[Bits 2:0] Package C-State Limit (R/W) Specifies the lowest processor-specific C-state code name (consuming the least power) for the package. The default is set as factory-configured package Cstate limit. The following C-state code name encodings are supported: 000b: C0/C1 (no package C-state support) 001b: C2 010b: C6 (non-retention) 011b: C6 (retention) 111b: No Package C state limits. All C states supported by the processor are available.

Definition at line 3053 of file SkylakeMsr.h.

◆ CFGLock

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::CFGLock

[Bit 15] CFG Lock (R/WO).

Definition at line 3063 of file SkylakeMsr.h.

◆ CStateDemotionEnable

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::CStateDemotionEnable

[Bit 29] Package C State Demotion Enable (R/W).

Definition at line 3089 of file SkylakeMsr.h.

◆ CStateUnDemotionEnable

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::CStateUnDemotionEnable

[Bit 30] Package C State UnDemotion Enable (R/W).

Definition at line 3093 of file SkylakeMsr.h.

◆ EnableC1Undemotion

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::EnableC1Undemotion

[Bit 28] Enable C1 Undemotion (R/W).

Definition at line 3085 of file SkylakeMsr.h.

◆ EnableC3Undemotion

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::EnableC3Undemotion

[Bit 27] Enable C3 Undemotion (R/W).

Definition at line 3081 of file SkylakeMsr.h.

◆ MWAITRedirectionEnable

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::MWAITRedirectionEnable

[Bit 10] I/O MWAIT Redirection Enable (R/W).

Definition at line 3058 of file SkylakeMsr.h.

◆ Reserved1

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved1

Definition at line 3054 of file SkylakeMsr.h.

◆ Reserved2

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved2

Definition at line 3059 of file SkylakeMsr.h.

◆ Reserved3

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved3

Definition at line 3069 of file SkylakeMsr.h.

◆ Reserved4

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved4

Definition at line 3094 of file SkylakeMsr.h.

◆ Reserved5

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Reserved5

Definition at line 3095 of file SkylakeMsr.h.

◆ Uint32

UINT32 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 3100 of file SkylakeMsr.h.

◆ Uint64

UINT64 MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 3104 of file SkylakeMsr.h.


The documentation for this union was generated from the following file: