#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32 PlatformPowerLimit1: 15

UINT32 EnablePlatformPowerLimit1: 1

UINT32 PlatformClampingLimitation1: 1

UINT32 Time: 7

UINT32 Reserved1: 8

UINT32 PlatformPowerLimit2: 15

UINT32 EnablePlatformPowerLimit2: 1

UINT32 PlatformClampingLimitation2: 1

UINT32 Reserved2: 14

UINT32 Lock: 1

}	Bits

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_PLATFORM_POWER_LIMIT

Definition at line 1104 of file SkylakeMsr.h.

Field Documentation

◆

struct { ... } MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::Bits

Individual bit fields

◆ EnablePlatformPowerLimit1

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::EnablePlatformPowerLimit1

[Bit 15] Enable Platform Power Limit #1. When set, enables the processor to apply control policy such that the platform power does not exceed Platform Power limit #1 over the time window specified by Power Limit #1 Time Window.

Definition at line 1123 of file SkylakeMsr.h.

◆ EnablePlatformPowerLimit2

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::EnablePlatformPowerLimit2

[Bit 47] Enable Platform Power Limit #2. When set, enables the processor to apply control policy such that the platform power does not exceed Platform Power limit #2 over the Short Duration time window.

Definition at line 1155 of file SkylakeMsr.h.

◆ Lock

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::Lock

[Bit 63] Lock. Setting this bit will lock all other bits of this MSR until system RESET.

Definition at line 1167 of file SkylakeMsr.h.

◆ PlatformClampingLimitation1

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::PlatformClampingLimitation1

[Bit 16] Platform Clamping Limitation #1. When set, allows the processor to go below the OS requested P states in order to maintain the power below specified Platform Power Limit #1 value. This bit is writeable only when CPUID (EAX=6):EAX[4] is set.

Definition at line 1130 of file SkylakeMsr.h.

◆ PlatformClampingLimitation2

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::PlatformClampingLimitation2

[Bit 48] Platform Clamping Limitation #2. When set, allows the processor to go below the OS requested P states in order to maintain the power below specified Platform Power Limit #2 value.

Definition at line 1161 of file SkylakeMsr.h.

◆ PlatformPowerLimit1

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::PlatformPowerLimit1

[Bits 14:0] Platform Power Limit #1. Average Power limit value which the platform must not exceed over a time window as specified by Power_Limit_1_TIME field. The default value is the Thermal Design Power (TDP) and varies with product skus. The unit is specified in MSR_RAPLPOWER_UNIT.

Definition at line 1116 of file SkylakeMsr.h.

◆ PlatformPowerLimit2

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::PlatformPowerLimit2

[Bits 46:32] Platform Power Limit #2. Average Power limit value which the platform must not exceed over the Short Duration time window chosen by the processor. The recommended default value is 1.25 times the Long Duration Power Limit (i.e. Platform Power Limit # 1).

Definition at line 1149 of file SkylakeMsr.h.

◆ Reserved1

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::Reserved1

Definition at line 1142 of file SkylakeMsr.h.

◆ Reserved2

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::Reserved2

Definition at line 1162 of file SkylakeMsr.h.

◆ Time

UINT32 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::Time

[Bits 23:17] Time Window for Platform Power Limit #1. Specifies the duration of the time window over which Platform Power Limit 1 value should be maintained for sustained long duration. This field is made up of two numbers from the following equation: Time Window = (float) ((1+(X/4))*(2^Y)), where: X. = POWER_LIMIT_1_TIME[23:22] Y. = POWER_LIMIT_1_TIME[21:17]. The maximum allowed value in this field is defined in MSR_PKG_POWER_INFO[PKG_MAX_WIN]. The default value is 0DH, The unit is specified in MSR_RAPLPOWER_UNIT[Time Unit].

Definition at line 1141 of file SkylakeMsr.h.

◆ Uint64

UINT64 MSR_SKYLAKE_PLATFORM_POWER_LIMIT_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 1172 of file SkylakeMsr.h.

The documentation for this union was generated from the following file:

MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h

Data Fields