MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32   MemTypePRMRRBASEMemType: 3
UINT32   Reserved1: 9
UINT32   BasePRMRRBaseAddress: 20
UINT32   Fix_Me_1: 14
UINT32   Reserved2: 18
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_PRMRR_PHYS_BASE

Definition at line 2361 of file SkylakeMsr.h.

Field Documentation

BasePRMRRBaseAddress

UINT32 MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::BasePRMRRBaseAddress

[Bits 31:12] Base PRMRR Base Address.

Definition at line 2374 of file SkylakeMsr.h.

struct { ... } MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::Bits

Individual bit fields

Fix_Me_1

UINT32 MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::Fix_Me_1

[Bits 45:32] Base PRMRR Base Address.

Definition at line 2378 of file SkylakeMsr.h.

MemTypePRMRRBASEMemType

UINT32 MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::MemTypePRMRRBASEMemType

[Bits 2:0] MemType PRMRR BASE MemType.

Definition at line 2369 of file SkylakeMsr.h.

Reserved1

UINT32 MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::Reserved1

Definition at line 2370 of file SkylakeMsr.h.

Reserved2

UINT32 MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::Reserved2

Definition at line 2379 of file SkylakeMsr.h.

Uint64

UINT64 MSR_SKYLAKE_PRMRR_PHYS_BASE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 2384 of file SkylakeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h