MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32   Reserved1: 10
UINT32   Fix_Me_1: 1
UINT32   VLD: 1
UINT32   Fix_Me_2: 20
UINT32   Fix_Me_3: 14
UINT32   Reserved2: 18
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_PRMRR_PHYS_MASK

Definition at line 2410 of file SkylakeMsr.h.

Field Documentation

struct { ... } MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Bits

Individual bit fields

Fix_Me_1

UINT32 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Fix_Me_1

[Bit 10] Lock Lock bit for the PRMRR.

Definition at line 2419 of file SkylakeMsr.h.

Fix_Me_2

UINT32 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Fix_Me_2

[Bits 31:12] Mask PRMRR MASK bits.

Definition at line 2427 of file SkylakeMsr.h.

Fix_Me_3

UINT32 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Fix_Me_3

[Bits 45:32] Mask PRMRR MASK bits.

Definition at line 2431 of file SkylakeMsr.h.

Reserved1

UINT32 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Reserved1

Definition at line 2415 of file SkylakeMsr.h.

Reserved2

UINT32 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Reserved2

Definition at line 2432 of file SkylakeMsr.h.

Uint64

UINT64 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 2437 of file SkylakeMsr.h.

VLD

UINT32 MSR_SKYLAKE_PRMRR_PHYS_MASK_REGISTER::VLD

[Bit 11] VLD Enable bit for the PRMRR.

Definition at line 2423 of file SkylakeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h