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Data Fields
MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields

struct {
   UINT32   PROCHOT_Status: 1
 
   UINT32   ThermalStatus: 1
 
   UINT32   Reserved1: 3
 
   UINT32   RunningAverageThermalLimitStatus: 1
 
   UINT32   VRThermAlertStatus: 1
 
   UINT32   VRThermalDesignCurrentStatus: 1
 
   UINT32   OtherStatus: 1
 
   UINT32   Reserved2: 1
 
   UINT32   PL1Status: 1
 
   UINT32   PL2Status: 1
 
   UINT32   Reserved3: 4
 
   UINT32   PROCHOT_Log: 1
 
   UINT32   ThermalLog: 1
 
   UINT32   Reserved4: 3
 
   UINT32   RunningAverageThermalLimitLog: 1
 
   UINT32   VRThermAlertLog: 1
 
   UINT32   VRThermalDesignCurrentLog: 1
 
   UINT32   OtherLog: 1
 
   UINT32   Reserved5: 1
 
   UINT32   PL1Log: 1
 
   UINT32   PL2Log: 1
 
   UINT32   Reserved6: 4
 
   UINT32   Reserved7: 32
 
} Bits
 
UINT32 Uint32
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_RING_PERF_LIMIT_REASONS

Definition at line 1405 of file SkylakeMsr.h.

Field Documentation

◆ 

struct { ... } MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Bits

Individual bit fields

◆ OtherLog

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::OtherLog

[Bit 24] Other Log When set, indicates that the OTHER Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1492 of file SkylakeMsr.h.

◆ OtherStatus

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::OtherStatus

[Bit 8] Other Status (R0) When set, frequency is reduced due to electrical or other constraints.

Definition at line 1440 of file SkylakeMsr.h.

◆ PL1Log

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::PL1Log

[Bit 26] Package/Platform-Level PL1 Power Limiting Log When set, indicates that the Package/Platform Level PL1 Power Limiting Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1500 of file SkylakeMsr.h.

◆ PL1Status

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::PL1Status

[Bit 10] Package/Platform-Level Power Limiting PL1 Status (R0) When set, frequency is reduced due to package/Platform-level power limiting PL1.

Definition at line 1447 of file SkylakeMsr.h.

◆ PL2Log

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::PL2Log

[Bit 27] Package/Platform-Level PL2 Power Limiting Log When set, indicates that the Package/Platform Level PL2 Power Limiting Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1507 of file SkylakeMsr.h.

◆ PL2Status

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::PL2Status

[Bit 11] Package/Platform-Level PL2 Power Limiting Status (R0) When set, frequency is reduced due to package/Platform-level power limiting PL2/PL3.

Definition at line 1453 of file SkylakeMsr.h.

◆ PROCHOT_Log

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::PROCHOT_Log

[Bit 16] PROCHOT Log When set, indicates that the PROCHOT Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1460 of file SkylakeMsr.h.

◆ PROCHOT_Status

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::PROCHOT_Status

[Bit 0] PROCHOT Status (R0) When set, frequency is reduced due to assertion of external PROCHOT.

Definition at line 1414 of file SkylakeMsr.h.

◆ Reserved1

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved1

Definition at line 1420 of file SkylakeMsr.h.

◆ Reserved2

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved2

Definition at line 1441 of file SkylakeMsr.h.

◆ Reserved3

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved3

Definition at line 1454 of file SkylakeMsr.h.

◆ Reserved4

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved4

Definition at line 1467 of file SkylakeMsr.h.

◆ Reserved5

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved5

Definition at line 1493 of file SkylakeMsr.h.

◆ Reserved6

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved6

Definition at line 1508 of file SkylakeMsr.h.

◆ Reserved7

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Reserved7

Definition at line 1509 of file SkylakeMsr.h.

◆ RunningAverageThermalLimitLog

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::RunningAverageThermalLimitLog

[Bit 21] Running Average Thermal Limit Log When set, indicates that the RATL Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1473 of file SkylakeMsr.h.

◆ RunningAverageThermalLimitStatus

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::RunningAverageThermalLimitStatus

[Bit 5] Running Average Thermal Limit Status (R0) When set, frequency is reduced due to running average thermal limit.

Definition at line 1425 of file SkylakeMsr.h.

◆ ThermalLog

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::ThermalLog

[Bit 17] Thermal Log When set, indicates that the Thermal Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1466 of file SkylakeMsr.h.

◆ ThermalStatus

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::ThermalStatus

[Bit 1] Thermal Status (R0) When set, frequency is reduced due to a thermal event.

Definition at line 1419 of file SkylakeMsr.h.

◆ Uint32

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 1514 of file SkylakeMsr.h.

◆ Uint64

UINT64 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 1518 of file SkylakeMsr.h.

◆ VRThermalDesignCurrentLog

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::VRThermalDesignCurrentLog

[Bit 23] VR Thermal Design Current Log When set, indicates that the VR Therm Alert Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1486 of file SkylakeMsr.h.

◆ VRThermalDesignCurrentStatus

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::VRThermalDesignCurrentStatus

[Bit 7] VR Thermal Design Current Status (R0) When set, frequency is reduced due to VR TDC limit.

Definition at line 1435 of file SkylakeMsr.h.

◆ VRThermAlertLog

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::VRThermAlertLog

[Bit 22] VR Therm Alert Log When set, indicates that the VR Therm Alert Status bit has asserted since the log bit was last cleared. This log bit will remain set until cleared by software writing 0.

Definition at line 1479 of file SkylakeMsr.h.

◆ VRThermAlertStatus

UINT32 MSR_SKYLAKE_RING_PERF_LIMIT_REASONS_REGISTER::VRThermAlertStatus

[Bit 6] VR Therm Alert Status (R0) When set, frequency is reduced due to a thermal alert from a processor Voltage Regulator.

Definition at line 1430 of file SkylakeMsr.h.

The documentation for this union was generated from the following file: