TianoCore EDK2 master
Loading...
Searching...
No Matches
MSR_SKYLAKE_SMM_MCA_CAP_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields

struct {
   UINT32   Reserved1: 32
 
   UINT32   Reserved2: 26
 
   UINT32   SMM_Code_Access_Chk: 1
 
   UINT32   Long_Flow_Indication: 1
 
   UINT32   Reserved3: 4
 
Bits
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_SMM_MCA_CAP

Definition at line 3206 of file SkylakeMsr.h.

Field Documentation

◆ 

struct { ... } MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::Bits

Individual bit fields

◆ Long_Flow_Indication

UINT32 MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::Long_Flow_Indication

[Bit 59] Long_Flow_Indication (SMM-RO) If set to 1 indicates that the SMM long flow indicator is supported and a host-space interface is available to SMM handler.

Definition at line 3224 of file SkylakeMsr.h.

◆ Reserved1

UINT32 MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::Reserved1

Definition at line 3211 of file SkylakeMsr.h.

◆ Reserved2

UINT32 MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::Reserved2

Definition at line 3212 of file SkylakeMsr.h.

◆ Reserved3

UINT32 MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::Reserved3

Definition at line 3225 of file SkylakeMsr.h.

◆ SMM_Code_Access_Chk

UINT32 MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::SMM_Code_Access_Chk

[Bit 58] SMM_Code_Access_Chk (SMM-RO) If set to 1 indicates that the SMM code access restriction is supported and a host-space interface is available to SMM handler.

Definition at line 3218 of file SkylakeMsr.h.

◆ Uint64

UINT64 MSR_SKYLAKE_SMM_MCA_CAP_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 3230 of file SkylakeMsr.h.


The documentation for this union was generated from the following file: