MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32   Reserved1: 16
UINT32   TemperatureTarget: 8
UINT32   TCCActivationOffset: 4
UINT32   Reserved2: 4
UINT32   Reserved3: 32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_TEMPERATURE_TARGET

Definition at line 3255 of file SkylakeMsr.h.

Field Documentation

struct { ... } MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::Bits

Individual bit fields

Reserved1

UINT32 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::Reserved1

Definition at line 3260 of file SkylakeMsr.h.

Reserved2

UINT32 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::Reserved2

Definition at line 3269 of file SkylakeMsr.h.

Reserved3

UINT32 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::Reserved3

Definition at line 3270 of file SkylakeMsr.h.

TCCActivationOffset

UINT32 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::TCCActivationOffset

[Bits 27:24] TCC Activation Offset (R/W) See Table 2-25.

Definition at line 3268 of file SkylakeMsr.h.

TemperatureTarget

UINT32 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::TemperatureTarget

[Bits 23:16] Temperature Target (RO) See Table 2-25.

Definition at line 3264 of file SkylakeMsr.h.

Uint32

UINT32 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 3275 of file SkylakeMsr.h.

Uint64

UINT64 MSR_SKYLAKE_TEMPERATURE_TARGET_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 3279 of file SkylakeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h