MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32   Fix_Me_1: 1
UINT32   Reserved: 17
UINT32   ACPIBAR_BASE_ADDRESS: 14
UINT32   Fix_Me_2: 32
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE

Definition at line 2311 of file SkylakeMsr.h.

Field Documentation

ACPIBAR_BASE_ADDRESS

UINT32 MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER::ACPIBAR_BASE_ADDRESS

[Bits 31:18] ACPIBAR_BASE_ADDRESS AET target address in NPK MMIO space.

Definition at line 2326 of file SkylakeMsr.h.

struct { ... } MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER::Bits

Individual bit fields

Fix_Me_1

UINT32 MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER::Fix_Me_1

[Bit 0] Lock Bit If set, this MSR cannot be re-written anymore. Lock bit has to be set in order for the AET packets to be directed to NPK MMIO.

Definition at line 2321 of file SkylakeMsr.h.

Fix_Me_2

UINT32 MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER::Fix_Me_2

[Bits 63:32] ACPIBAR_BASE_ADDRESS AET target address in NPK MMIO space.

Definition at line 2330 of file SkylakeMsr.h.

Reserved

UINT32 MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER::Reserved

Definition at line 2322 of file SkylakeMsr.h.

Uint64

UINT64 MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 2335 of file SkylakeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h