MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h>

Data Fields
struct {
UINT32   Reserved1: 12
UINT32   Fix_Me_1: 20
UINT32   Fix_Me_2: 7
UINT32   Reserved2: 25
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE

Definition at line 2522 of file SkylakeMsr.h.

Field Documentation

struct { ... } MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER::Bits

Individual bit fields

Fix_Me_1

UINT32 MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER::Fix_Me_1

[Bits 31:12] Range Base This field corresponds to bits 38:12 of the base address memory range which is allocated to PRMRR memory.

Definition at line 2532 of file SkylakeMsr.h.

Fix_Me_2

UINT32 MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER::Fix_Me_2

[Bits 38:32] Range Base This field corresponds to bits 38:12 of the base address memory range which is allocated to PRMRR memory.

Definition at line 2537 of file SkylakeMsr.h.

Reserved1

UINT32 MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER::Reserved1

Definition at line 2527 of file SkylakeMsr.h.

Reserved2

UINT32 MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER::Reserved2

Definition at line 2538 of file SkylakeMsr.h.

Uint64

UINT64 MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 2543 of file SkylakeMsr.h.

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The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h