MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER Union Reference

#include <MdePkg/Include/Register/Intel/Msr/XeonPhiMsr.h>

Data Fields
struct {
UINT32   MAX_RATIO: 7
UINT32   Reserved1: 1
UINT32   MIN_RATIO: 7
UINT32   Reserved2: 17
UINT32   Reserved3: 32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT

Definition at line 1417 of file XeonPhiMsr.h.

Field Documentation

struct { ... } MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::Bits

Individual bit fields

MAX_RATIO

UINT32 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::MAX_RATIO

[Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the LLC/Ring.

Definition at line 1426 of file XeonPhiMsr.h.

MIN_RATIO

UINT32 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::MIN_RATIO

[Bits 14:8] MIN_RATIO Writing to this field controls the minimum possible ratio of the LLC/Ring.

Definition at line 1432 of file XeonPhiMsr.h.

Reserved1

UINT32 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::Reserved1

Definition at line 1427 of file XeonPhiMsr.h.

Reserved2

UINT32 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::Reserved2

Definition at line 1433 of file XeonPhiMsr.h.

Reserved3

UINT32 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::Reserved3

Definition at line 1434 of file XeonPhiMsr.h.

Uint32

UINT32 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::Uint32

All bit fields as a 32-bit value

Definition at line 1439 of file XeonPhiMsr.h.

Uint64

UINT64 MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 1443 of file XeonPhiMsr.h.

---

The documentation for this union was generated from the following file:

• MdePkg/Include/Register/Intel/Msr/XeonPhiMsr.h