8259.c

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#include "8259.h"
 
//
// Global for the Legacy 8259 Protocol that is produced by this driver
//
EFI_LEGACY_8259_PROTOCOL  mInterrupt8259 = {
  Interrupt8259SetVectorBase,
  Interrupt8259GetMask,
  Interrupt8259SetMask,
  Interrupt8259SetMode,
  Interrupt8259GetVector,
  Interrupt8259EnableIrq,
  Interrupt8259DisableIrq,
  Interrupt8259GetInterruptLine,
  Interrupt8259EndOfInterrupt
};
 
//
// Global for the handle that the Legacy 8259 Protocol is installed
//
EFI_HANDLE  m8259Handle = NULL;
 
UINT8          mMasterBase        = 0xff;
UINT8          mSlaveBase         = 0xff;
EFI_8259_MODE  mMode              = Efi8259ProtectedMode;
UINT16         mProtectedModeMask = 0xffff;
UINT16         mLegacyModeMask;
UINT16         mProtectedModeEdgeLevel = 0x0000;
UINT16         mLegacyModeEdgeLevel;
 
//
// Worker Functions
//
 
VOID
Interrupt8259WriteMask (
  IN UINT16  Mask,
  IN UINT16  EdgeLevel
  )
{
  IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8)Mask);
  IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8)(Mask >> 8));
  IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8)EdgeLevel);
  IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8)(EdgeLevel >> 8));
}
 
VOID
Interrupt8259ReadMask (
  OUT UINT16  *Mask,
  OUT UINT16  *EdgeLevel
  )
{
  UINT16  MasterValue;
  UINT16  SlaveValue;
 
  if (Mask != NULL) {
    MasterValue = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
    SlaveValue  = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
 
    *Mask = (UINT16)(MasterValue | (SlaveValue << 8));
  }
 
  if (EdgeLevel != NULL) {
    MasterValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER);
    SlaveValue  = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE);
 
    *EdgeLevel = (UINT16)(MasterValue | (SlaveValue << 8));
  }
}
 
//
// Legacy 8259 Protocol Interface Functions
//
 
EFI_STATUS
EFIAPI
Interrupt8259SetVectorBase (
  IN EFI_LEGACY_8259_PROTOCOL  *This,
  IN UINT8                     MasterBase,
  IN UINT8                     SlaveBase
  )
{
  UINT8    Mask;
  EFI_TPL  OriginalTpl;
 
  OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
  //
  // Set vector base for slave PIC
  //
  if (SlaveBase != mSlaveBase) {
    mSlaveBase = SlaveBase;
 
    //
    // Initialization sequence is needed for setting vector base.
    //
 
    //
    // Preserve interrtup mask register before initialization sequence
    // because it will be cleared during initialization
    //
    Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
 
    //
    // ICW1: cascade mode, ICW4 write required
    //
    IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x11);
 
    //
    // ICW2: new vector base (must be multiple of 8)
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, mSlaveBase);
 
    //
    // ICW3: slave indentification code must be 2
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x02);
 
    //
    // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x01);
 
    //
    // Restore interrupt mask register
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, Mask);
  }
 
  //
  // Set vector base for master PIC
  //
  if (MasterBase != mMasterBase) {
    mMasterBase = MasterBase;
 
    //
    // Initialization sequence is needed for setting vector base.
    //
 
    //
    // Preserve interrtup mask register before initialization sequence
    // because it will be cleared during initialization
    //
    Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
 
    //
    // ICW1: cascade mode, ICW4 write required
    //
    IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x11);
 
    //
    // ICW2: new vector base (must be multiple of 8)
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, mMasterBase);
 
    //
    // ICW3: slave PIC is cascaded on IRQ2
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x04);
 
    //
    // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x01);
 
    //
    // Restore interrupt mask register
    //
    IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);
  }
 
  IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
  IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
 
  gBS->RestoreTPL (OriginalTpl);
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259GetMask (
  IN  EFI_LEGACY_8259_PROTOCOL  *This,
  OUT UINT16                    *LegacyMask  OPTIONAL,
  OUT UINT16                    *LegacyEdgeLevel  OPTIONAL,
  OUT UINT16                    *ProtectedMask  OPTIONAL,
  OUT UINT16                    *ProtectedEdgeLevel OPTIONAL
  )
{
  if (LegacyMask != NULL) {
    *LegacyMask = mLegacyModeMask;
  }
 
  if (LegacyEdgeLevel != NULL) {
    *LegacyEdgeLevel = mLegacyModeEdgeLevel;
  }
 
  if (ProtectedMask != NULL) {
    *ProtectedMask = mProtectedModeMask;
  }
 
  if (ProtectedEdgeLevel != NULL) {
    *ProtectedEdgeLevel = mProtectedModeEdgeLevel;
  }
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259SetMask (
  IN EFI_LEGACY_8259_PROTOCOL  *This,
  IN UINT16                    *LegacyMask  OPTIONAL,
  IN UINT16                    *LegacyEdgeLevel  OPTIONAL,
  IN UINT16                    *ProtectedMask  OPTIONAL,
  IN UINT16                    *ProtectedEdgeLevel OPTIONAL
  )
{
  if (LegacyMask != NULL) {
    mLegacyModeMask = *LegacyMask;
  }
 
  if (LegacyEdgeLevel != NULL) {
    mLegacyModeEdgeLevel = *LegacyEdgeLevel;
  }
 
  if (ProtectedMask != NULL) {
    mProtectedModeMask = *ProtectedMask;
  }
 
  if (ProtectedEdgeLevel != NULL) {
    mProtectedModeEdgeLevel = *ProtectedEdgeLevel;
  }
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259SetMode (
  IN EFI_LEGACY_8259_PROTOCOL  *This,
  IN EFI_8259_MODE             Mode,
  IN UINT16                    *Mask  OPTIONAL,
  IN UINT16                    *EdgeLevel OPTIONAL
  )
{
  if (Mode == mMode) {
    return EFI_SUCCESS;
  }
 
  if (Mode == Efi8259LegacyMode) {
    //
    // In Efi8259ProtectedMode, mask and edge/level trigger registers should
    // be changed through this protocol, so we can track them in the
    // corresponding module variables.
    //
    Interrupt8259ReadMask (&mProtectedModeMask, &mProtectedModeEdgeLevel);
 
    if (Mask != NULL) {
      //
      // Update the Mask for the new mode
      //
      mLegacyModeMask = *Mask;
    }
 
    if (EdgeLevel != NULL) {
      //
      // Update the Edge/Level triggered mask for the new mode
      //
      mLegacyModeEdgeLevel = *EdgeLevel;
    }
 
    mMode = Mode;
 
    //
    // Write new legacy mode mask/trigger level
    //
    Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);
 
    return EFI_SUCCESS;
  }
 
  if (Mode == Efi8259ProtectedMode) {
    //
    // Save the legacy mode mask/trigger level
    //
    Interrupt8259ReadMask (&mLegacyModeMask, &mLegacyModeEdgeLevel);
    //
    // Always force Timer to be enabled after return from 16-bit code.
    // This always insures that on next entry, timer is counting.
    //
    mLegacyModeMask &= 0xFFFE;
 
    if (Mask != NULL) {
      //
      // Update the Mask for the new mode
      //
      mProtectedModeMask = *Mask;
    }
 
    if (EdgeLevel != NULL) {
      //
      // Update the Edge/Level triggered mask for the new mode
      //
      mProtectedModeEdgeLevel = *EdgeLevel;
    }
 
    mMode = Mode;
 
    //
    // Write new protected mode mask/trigger level
    //
    Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
 
    return EFI_SUCCESS;
  }
 
  return EFI_INVALID_PARAMETER;
}
 
EFI_STATUS
EFIAPI
Interrupt8259GetVector (
  IN  EFI_LEGACY_8259_PROTOCOL  *This,
  IN  EFI_8259_IRQ              Irq,
  OUT UINT8                     *Vector
  )
{
  if ((UINT32)Irq > Efi8259Irq15) {
    return EFI_INVALID_PARAMETER;
  }
 
  if (Irq <= Efi8259Irq7) {
    *Vector = (UINT8)(mMasterBase + Irq);
  } else {
    *Vector = (UINT8)(mSlaveBase + (Irq - Efi8259Irq8));
  }
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259EnableIrq (
  IN EFI_LEGACY_8259_PROTOCOL  *This,
  IN EFI_8259_IRQ              Irq,
  IN BOOLEAN                   LevelTriggered
  )
{
  if ((UINT32)Irq > Efi8259Irq15) {
    return EFI_INVALID_PARAMETER;
  }
 
  mProtectedModeMask = (UINT16)(mProtectedModeMask & ~(1 << Irq));
  if (LevelTriggered) {
    mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel | (1 << Irq));
  } else {
    mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel & ~(1 << Irq));
  }
 
  Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259DisableIrq (
  IN EFI_LEGACY_8259_PROTOCOL  *This,
  IN EFI_8259_IRQ              Irq
  )
{
  if ((UINT32)Irq > Efi8259Irq15) {
    return EFI_INVALID_PARAMETER;
  }
 
  mProtectedModeMask = (UINT16)(mProtectedModeMask | (1 << Irq));
 
  mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel & ~(1 << Irq));
 
  Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259GetInterruptLine (
  IN  EFI_LEGACY_8259_PROTOCOL  *This,
  IN  EFI_HANDLE                PciHandle,
  OUT UINT8                     *Vector
  )
{
  EFI_PCI_IO_PROTOCOL  *PciIo;
  UINT8                InterruptLine;
  EFI_STATUS           Status;
 
  Status = gBS->HandleProtocol (
                  PciHandle,
                  &gEfiPciIoProtocolGuid,
                  (VOID **)&PciIo
                  );
  if (EFI_ERROR (Status)) {
    return EFI_INVALID_PARAMETER;
  }
 
  PciIo->Pci.Read (
               PciIo,
               EfiPciIoWidthUint8,
               PCI_INT_LINE_OFFSET,
               1,
               &InterruptLine
               );
  //
  // Interrupt line is same location for standard PCI cards, standard
  // bridge and CardBus bridge.
  //
  *Vector = InterruptLine;
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Interrupt8259EndOfInterrupt (
  IN EFI_LEGACY_8259_PROTOCOL  *This,
  IN EFI_8259_IRQ              Irq
  )
{
  if ((UINT32)Irq > Efi8259Irq15) {
    return EFI_INVALID_PARAMETER;
  }
 
  if (Irq >= Efi8259Irq8) {
    IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
  }
 
  IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
 
  return EFI_SUCCESS;
}
 
EFI_STATUS
EFIAPI
Install8259 (
  IN EFI_HANDLE        ImageHandle,
  IN EFI_SYSTEM_TABLE  *SystemTable
  )
{
  EFI_STATUS    Status;
  EFI_8259_IRQ  Irq;
 
  //
  // Initialze mask values from PCDs
  //
  mLegacyModeMask      = PcdGet16 (Pcd8259LegacyModeMask);
  mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);
 
  //
  // Clear all pending interrupt
  //
  for (Irq = Efi8259Irq0; Irq <= Efi8259Irq15; Irq++) {
    Interrupt8259EndOfInterrupt (&mInterrupt8259, Irq);
  }
 
  //
  // Set the 8259 Master base to 0x68 and the 8259 Slave base to 0x70
  //
  Status = Interrupt8259SetVectorBase (&mInterrupt8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);
 
  //
  // Set all 8259 interrupts to edge triggered and disabled
  //
  Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
 
  //
  // Install 8259 Protocol onto a new handle
  //
  Status = gBS->InstallProtocolInterface (
                  &m8259Handle,
                  &gEfiLegacy8259ProtocolGuid,
                  EFI_NATIVE_INTERFACE,
                  &mInterrupt8259
                  );
  return Status;
}